LTC1864 LINER [Linear Technology], LTC1864 Datasheet - Page 10

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LTC1864

Manufacturer Part Number
LTC1864
Description
?Power, 16-Bit, 250ksps 1- and 2-Channel ADCs in MSOP
Manufacturer
LINER [Linear Technology]
Datasheet

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LTC1864/LTC1865
APPLICATIO S I FOR ATIO
LTC1865 OPERATION
Operating Sequence
The LTC1865 conversion cycle begins with the rising edge
of CONV. After a period equal to t
finished. If CONV is left high after this time, the LTC1865
goes into sleep mode drawing only leakage current. The
LTC1865’s 2-bit data word is clocked into the SDI input on
the rising edge of SCK after CONV goes low. Additional
inputs on the SDI pin are then ignored until the next CONV
cycle. The shift clock (SCK) synchronizes the data transfer
with each bit being transmitted on the falling SCK edge and
captured on the rising SCK edge in both transmitting and
receiving systems. The data is transmitted and received
simultaneously (full duplex). After completing the data
transfer, if further SCK clocks are applied with CONV low,
SDO will output zeros indefinitely. See Figure 4.
Analog Inputs
The two bits of the input word (SDI) assign the MUX
configuration for the next requested conversion. For a
given channel selection, the converter will measure the
voltage between the two channels indicated by the “+”
and “–” signs in the selected row of the following table. In
10
CONV
SDO
SCK
SDI
U
t
CONV
U
DON’T CARE
CONV
Hi-Z
W
, the conversion is
Figure 4. LTC1865 Operating Sequence
SLEEP MODE
U
single-ended mode, all input channels are measured with
respect to GND. A zero code will occur when the “+” input
minus the “–” input equals zero. Full scale occurs when
the “+” input minus the “–” input equals V
1LSB. See Figure 5. Both the “+” and “–” inputs are
sampled at the same time so common mode noise is
rejected. The input span in the SO-8 package is fixed at
V
grounded, a rail-to-rail input span will result on the “+”
input.
Reference Input
The reference input of the LTC1865 SO-8 package is
internally tied to V
therefore equal to V
of the LTC1865 MSOP package defines the span of the
A/D converter. The LTC1865 MSOP package can operate
with reference voltages from 1V to V
REF
SINGLE-ENDED
DIFFERENTIAL
*AFTER COMPLETING THE DATA TRANSFER, IF FURTHER SCK CLOCKS ARE
S/D O/S
APPLIED WITH CONV LOW, THE ADC WILL OUTPUT ZEROS INDEFINITELY
B15 B14
MUX MODE
MUX MODE
1
= V
2
B13
CC
3
B12
. If the “–” input in differential mode is
4
B11
Table 1. Multiplexer Channel Selection
5
SGL/DIFF
B10
6
MUX ADDRESS
CC
1
1
0
0
CC
B9
7
. The span of the A/D converter is
. The voltage on the reference input
B8
t
DON’T CARE
8
SMPL
B7
ODD/SIGN
9
B6
10
0
1
0
1
B5
11
B4
12
B3
13
CC
CHANNEL #
0
+
+
B2
.
14
B1
15
B0*
16
1
+
+
1864 F04
REF
sn18645 18645fs
Hi-Z
GND
minus
1864 TBL1

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