LTC1564 LINER [Linear Technology], LTC1564 Datasheet - Page 6

• Manufacturer Part Number: LTC1564
• Description: 10kHz to 150kHz Digitally Controlled Antialiasing Filter and 4-Bit P.G.A
• Manufacturer: LINER [Linear Technology]

LTC1564
PI FU CTIO S
passes the bits directly when the CS/HOLD input is at logic
0. When CS/HOLD changes to logic 1, the F pins cease to
have effect and the latch holds the previous values. The F
code controls the filter’s cutoff frequency f
up to 150kHz, as summarized in Table 1.
Table 1
Thus f
Note that small current sources pull F1 to V
and F0 to V
Electrical Characteristics, Note 5). This sets an F code
input of 0010 (2, in decimal form) by default, giving an f
of 20kHz in normal filtering operation, if CS/HOLD is logic
0 or is open circuited.
6
(AT OUTPUT OF INTERNAL LATCH) (CUTOFF FREQUENCY)
U
F3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
C
is proportional to the binary value of the F code.
U
F2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
–
Table 2
when these pins are left unconnected (see
(AT OUTPUT OF INTERNAL LATCH)
F1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
G3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
U
F0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
G2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
NOMINAL F
0 (Mute State: Filter Gain is Zero)
10kHz
20kHz
30kHz
40kHz
50kHz
60kHz
70kHz
80kHz
90kHz
100kHz
110kHz
120kHz
130kHz
140kHz
150kHz
G1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
G0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
C
C
in 10kHz steps
(VOLT/VOLT) (dB)
+
PASSBAND GAIN
and F3, F2
10
11
12
13
14
15
16
NOMINAL
1
2
3
4
5
6
7
8
9
C
14.0
15.6
16.9
18.1
19.1
20.0
20.8
21.6
22.3
22.9
23.5
24.1
6.0
9.5
12
0
G0, G1, G2, G3 (Pins 9, 10, 11, 12): CMOS-Level Digital
Gain Control (“G Code”) Inputs. G3 is the most significant
bit (MSB). These pins program the LTC1564’s passband
gain through the internal latch, which passes the bits
directly when the CS/HOLD input is at logic 0. When
CS/HOLD changes to logic 1, the G pins cease to have
effect and the latch retains the previous input values. This
gain control is linear in amplitude: nominal passband gain
of the LTC1564 is the binary value of the G code, plus one
as shown in Table 2.
Note that small current sources pull the G pins to V
these pins are left unconnected (see Electrical Character-
istics, Note 5). This sets a G code input of 0000 by default,
giving unity passband gain in normal filtering operation, if
CS/HOLD is logic 0 or is open circuited.
RST (Pin 13): CMOS-Level Asynchronous Reset Input.
Logic 0 on this pin immediately resets the internal F and G
latch to all zeros, regardless of the state of the CS/HOLD
pin or the F or G input pins. This causes the LTC1564 to
enter a mute state (powered but with zero signal gain)
because of the resulting F = 0000 command. Logic 1
permits the other pins to control F and G. This pin floats to
logic 1 (V
current source (see Electrical Characteristics, Note 5). A
brief internal reset (shorter than the analog settling time of
the filter) also occurs when power is first applied.
DUAL 5V SINGLE 5V SINGLE 3V
MAXIMUM INPUT SIGNAL LEVEL
3.33
1.67
1.43
1.25
0.91
0.83
0.77
0.71
0.67
0.63
2.5
1.1
1.0
10
5
2
(VOLTS PEAK-TO-PEAK)
+
) when open circuited because of a small
1.67
1.25
0.71
0.63
0.56
0.50
0.45
0.42
0.38
0.36
0.33
0.31
0.83
5.0
2.5
1
0.75
0.43
0.38
0.33
0.30
0.27
0.25
0.23
0.21
0.20
0.19
3.0
1.5
1.0
0.6
0.5
INPUT IMPEDANCE
NOMINAL
(k )
3.33
1.67
1.43
1.25
1.11
0.91
0.83
0.77
0.71
0.66
0.63
2.5
10
5
2
1
–
when