LTC1530 LINER [Linear Technology], LTC1530 Datasheet - Page 11
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LTC1530
Manufacturer Part Number
LTC1530
Description
High Power Synchronous Switching Regulator Controller
Manufacturer
LINER [Linear Technology]
Datasheet
1.LTC1530.pdf
(24 pages)
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13 485
APPLICATIO S I FOR ATIO
Power MOSFETs
Two N-channel power MOSFETs are required for synchro-
nous LTC1530 circuits. They should be selected based
primarily on threshold voltage and on-resistance consid-
erations. Thermal dissipation is often a secondary con-
cern in high efficiency designs. The required MOSFET
threshold should be determined based on the available
power supply voltages and/or the complexity of the gate
drive charge pump scheme. In 5V input designs where a
12V supply is used to power PV
with R
good results. The current drawn from the 12V supply
varies with the MOSFETs used and the LTC1530’s operat-
ing frequency, but is generally less than 50mA.
LTC1530 applications that use a 5V V
doubling charge pump to generate PV
enough gate drive voltage to fully enhance standard
power MOSFETs. Under this condition, the effective
MOSFET R
tion in the FETs and reducing efficiency. In addition,
power supply start-up problems can occur with standard
power MOSFETs. These start-up problems can occur for
two reasons. First, if the MOSFET is not fully enhanced,
the higher effective R
vate current limit at a much lower level than the desired
trip point. Second, standard MOSFETs have higher GATE
threshold voltages than logic level MOSFETs, thereby
increasing the PV
1N5243B
OPTIONAL FOR
13V
V
IN
DS(ON)
> 6.5V
DS(ON)
LTC1530
+
specified at V
Figure 7. Doubling Charge Pump
10 F
may be quite high, raising the dissipa-
CC
U
voltage required to turn them on. A
DS(ON)
PV
MBR0530T1 MBR0530T1
CC
U
GS
G1
G2
causes the LTC1530 to acti-
= 5V or 6V can be used with
CC
0.22 F
W
, standard MOSFETs
CC
V
IN
IN
Q1
Q2
do not provide
voltage and a
L
O
U
+
+
C
C
IN
O
V
1530 F07
OUT
MOSFET whose R
necessarily have a logic level MOSFET GATE threshold
voltage. Logic level FETs are the recommended choice for
5V-only systems. Logic level FETs can be fully enhanced
with a doubler charge pump and will operate at maximum
efficiency. Note that doubler charge pump designs run-
ning from supplies higher than 6.5V should include a
Zener diode clamp at PV
exceeding the absolute maximum rating of the pin.
After the MOSFET threshold voltage is selected, choose
the R
allowable power dissipation and maximum output cur-
rent. In a typical LTC1530 buck converter circuit, operat-
ing in continuous mode, the average inductor current is
equal to the output load current. This current flows through
either Q1 or Q2 with the power dissipation split up accord-
ing to the duty cycle:
The R
be calculated by rearranging the relation P = I
DC Q
DC Q
R
R
DS ON Q
DS ON Q
DS(ON)
DS(ON)
(
(
1
2
)
)
based on the input voltage, the output voltage,
1
2
required for a given conduction loss can now
V
1
V
OUT
IN
DC Q
V
V
V
DC Q
V
V
IN
OUT
OUT
DS(ON)
IN
IN
( )
V
P
( )
P
IN
MAX Q
P
MAX Q
1
MAX Q
2
V
I
OUT
MAX
P
is rated at V
( )
(
MAX Q
CC
I
V
( )
MAX
I
IN
1
MAX
2
1
2
)
to prevent transients from
(
V
2
I
IN
MAX
2
V
2
OUT
)
2
GS
= 4.5V does not
LTC1530
2
R.
11