LT1236A-5 LINER [Linear Technology], LT1236A-5 Datasheet - Page 15

• Manufacturer Part Number: LT1236A-5
• Description: Easy-to-Use, Ultra-Tiny 16-Bit ADC
• Manufacturer: LINER [Linear Technology]

APPLICATIONS INFORMATION
elements which reduce the ADC performance sensitivity to
PCB layout and external components. Nevertheless, the very
high accuracy of this converter is best preserved by careful
low and high frequency power supply decoupling.
A 0.1μF , high quality, ceramic capacitor in parallel with a
10μF ceramic capacitor should be connected between the
V
The 0.1μF capacitor should be placed closest to the ADC
package. It is also desirable to avoid any via in the circuit
path starting from the converter V
these two decoupling capacitors and returning to the
converter GND pin. The area encompassed by this circuit
path, as well as the path length, should be minimized.
Very low impedance ground and power planes and star
connections at both V
V
decoupling capacitors described above and the second to
the power supply voltage. The GND pin should have three
distinct connections: the fi rst to the decoupling capacitors
described above, the second to the ground return for the
input signal source and the third to the ground return for
the power supply voltage source.
Driving V
The V
using the equivalent circuit of Figure 15. The input signal
V
equivalent source resistance R
both the actual generator source resistance and any
additional optional resistor connected to the V
optional input capacitor C
V
input parasitic capacitance C
CC
CC
SIG
IN
pin should have two distinct connections: the fi rst to the
pin. This capacitor is placed in parallel with the ADC
and GND pins, as close as possible to the package.
is connected to the ADC input pin V
IN
input drive requirements can be best analyzed
IN
CC
and GND pins are preferable. The
IN
PAR
is also connected to the ADC
. Depending upon the PCB
V
S
SIG
. This resistor includes
CC
+
–
pin, passing through
Figure 15. LTC2450-1 Input Drive Equivalent Circuit
R
S
IN
C
IN
through an
IN
pin. An
C
PAR
V
IN
V
CC
layout C
addition, the equivalent circuit of Figure 15 includes the
converter equivalent internal resistor R
capacitor C
There are some immediate trade-offs in R
needing a full circuit analysis. Increasing R
give the following benefi ts:
1) Due to the LTC2450-1’s input sampling algorithm, the
2) The bandwidth from V
3) Noise generated by the ADC is attenuated before it goes
4) A large C
5) Increasing R
There is a limit to how large R
application. Increasing R
the voltage drop across R
the point that signifi cant measurement errors exist. Ad-
ditionally, for some applications, increasing the R
product too much may unacceptably attenuate the signal
at frequencies of interest.
I
LEAK
V
input current drawn by V
is 50nA. A high R
components of the input current, and R
1kΩ result in <1LSB error.
width reduction isolates the ADC from high frequency
signals, and as such provides simple antialiasing and
input noise reduction.
back to the signal source.
reduce refl ections back to the signal source.
during an outside-the-rails fault condition. R
easily sized such as to protect against even extreme
fault conditions.
CC
I
LEAK
PAR
0.35pF
(TYP)
(TYP)
R
15k
SW
C
EQ
EQ
IN
has typical values between 2pF and 15pF . In
.
gives a better AC ground at V
S
protects the ADC by limiting the current
S
24501 F15
• C
I
CONV
IN
S
SIG
beyond a given point increases
S
IN
attenuates the high frequency
is reduced at V
due to the input current, to
S
during the conversion cycle
• C
IN
LTC2450-1
should be for a given
SW
S
and C
S
and sampling
S
IN
values up to
and C
.This band-
IN
IN
, helping
S
without
15
can be
S
IN
24501fb
• C
can
IN