LTC1473 LINER [Linear Technology], LTC1473 Datasheet - Page 5

• Manufacturer Part Number: LTC1473
• Description: Dual PowerPathTM Switch Driver
• Manufacturer: LINER [Linear Technology]

PIN
IN1 (Pin 1): Logic Input of Gate Drivers GA1 and GB1. IN1
is disabled when IN2 is high or DIODE is low.
IN2 (Pin 2): Logic Input of Gate Drivers GA2 and GB2. IN2
is disabled when IN1 is high or DIODE is low.
DIODE (Pin 3): “2-Diode Mode” Logic Input. DIODE over-
rides IN1 and IN2 by forcing the two back-to-back
external N-channel MOSFET switches to mimic two
diodes.
TIMER (Pin 4): Fault Timer. A capacitor connected from
this pin to GND programs the time the MOSFET switches
are allowed to be in current limit. To disable this function,
Pin 4 can be grounded.
V
capacitor.
V
is intended only for driving the internal micropower gate
drive circuitry. Do not load this pin with any external
circuitry . Bypass this pin with at least 1 F.
SW (Pin 7): Open Drain of an internal N-Channel MOSFET
Switch. This pin drives the bottom of the V
regulator inductor which is connected between this pin
and the V
GND (Pin 8): Ground.
GA2, GB2 (Pins 11, 9): Switch Gate Drivers. GA2 and GB2
drive the gates of the second back-to-back external
N-channel switches.
+
GG
(Pin 5): Input Supply. Bypass this pin with at least a 1 F
U
(Pin 6): Gate Driver Supply. This high voltage supply
FUNCTIONS
+
U
pin.
U
GG
switching
SAB2 (Pin 10): Source Return. The SAB2 pin is connected
to the sources of SW A2 and SW B2. A small pull-down
current source returns this node to 0V when the switches
are turned off.
SENSE
connected directly to the bottom (output side) of the low
value current sense resistor in series with the two input
power selector switch pairs, SW A1/B1 and SW A2/B2, for
detecting and controlling the inrush current into and out of
the power supply sources and the output capacitor.
SENSE
connected directly to the top (switch side) of the low value
current sense resistor in series with the two input power
selector switch pairs, SW A1/B1 and SW A2/B2, for
detecting and controlling the inrush current into and out of
the power supply sources and the output capacitor. Cur-
rent limit is invoked when (V
GA1, GB1 (Pins 16, 14): Switch Gate Drivers. GA1 and
GB1 drive the gates of the first back-to-back external
N-channel switches.
SAB1 (Pin 15): Source Return. The SAB1 pin is connected
to the sources of SW A1 and SW B1. A small pull-down
current source returns this node to 0V when the switches
are turned off.
0.2V.
–
+
(Pin 12): Inrush Current Input. This pin should be
(Pin 13): Inrush Current Input. This pin should be
SENSE
+
– V
SENSE
LTC1473
–
) exceeds
5