LTC1325 LINER [Linear Technology], LTC1325 Datasheet - Page 18

• Manufacturer Part Number: LTC1325
• Description: Microprocessor-Controlled Battery Management System
• Manufacturer: LINER [Linear Technology]

APPLICATIONS
LTC1325
2. V
18
The LTC1325 has five duty ratio and four V
giving 20 possible charge rates (for a given value of
R
combination of V
charging current is given by:
NORMALIZED
V
1(VR1 = 1, VR0 = 1)
1/3(VR1 = 1, VR0 = 0)
1/5(VR1 = 0, VR0 = 1)
1/10(VR1 = 0, VR0 = 0) 1/10
Note that the table entries give relative charge rates
assuming that the VR1 = 1, VR0 = 1, duty ratio = 1 entry
is equivalent to a 1C charge rate. Therefore, the charge
rate (in C-units) for other VR1, VR0, and duty ratio
settings may be read directly from the table. In gen-
eral, the VR1 = 1, VR0 = 1, duty ratio = 1 entry can be
equivalent to any charge rate, say k times 1C. Then all
entries in the table should be multiplied by k. In
general, V
the microprocessor to charge batteries of different
capacities or to alter charge rates when charging the
same battery in several stages. For best accuracy, VR1
and VR0 should be set to 1 where possible.
The power dissipation of the sense resistor varies
between charge, discharge and gas gauge modes and
should be calculated for all three modes. Typically,
dissipation is higher in discharge and gas gauge
modes since batteries can deliver higher currents than
they can be charged with.
In gas gauge mode, the load current supplied by the
battery should not exceed 450mV/R
gauge to remain linear in response. R
low enough to ensure that I
fall below ground by more than 1 diode drop.
maximum battery voltage to prevent a BATP = 0 error
when the LTC1325 is in charge or discharge mode. If
this requirement cannot be met in a specific applica-
tion, an external battery divider should be connected
DAC
DD
SENSE
AVG I
Supply: V
) as shown in the following table. For any
CHRG
DAC
= V
and duty ratio settings are changed by
DD
U
DAC
should be at least 1.8V above the
DAC
INFORMATION
(Duty Ratio)/R
U
1/3
1/5
1
1
and duty ratio, the average
1/10
1/20
1/2
1/2
1/6
LOAD
W
DUTY RATIO
(R
1/12
1/40
l/20
SENSE
1/4
1/4
SENSE
SENSE
SENSE
DAC
) does not
1/24 1/48
1/40 1/80
1/80 1/160
for the gas
U
1/8
1/8
should be
settings
1/16
1/16
3. Inductor L: To minimize losses, the inductor should
4. Catch Diode D1: The catch diode should have a low
between the V
divider should be set to divide-by-1.
The minimum V
end-of-charge voltage V
(n) in the battery plus drops across the on-resistance
of the PFET, inductor (V
R
Minimum V
results from these two equations:
or,
Assuming V
8 cells with a 16V supply. For a higher number of cells,
an external level shifter and regulator are needed.
In some applications, there are other circuits attached
to the charging supply. When the charging supply
(V
supply current to these circuits through the PFET body
diode. To prevent this, a blocking diode can be added
in series with V
Application section.
have low winding resistance. It should be able to
handle expected peak charging currents without satu-
ration. If the inductor saturates, the charging current
is limited only by the total PFET R
winding resistance, R
tance. This fault current may be high enough to
damage the battery or cause the maximum power
ratings of the PFET, inductor or R
ceeded.
forward drop and fast reverse recovery time to mini-
mize power dissipation. Total power loss is given by:
INT
DC
Min V
n(R
Min V
P
dD1
) is powered down or removed, the battery may
and sense resistor R
INT
= V
DD
DD
)] + n(V
F
= n(V
= I
DD
EC
I
F
CHRG
DC
BAT
= 1.6V, the LTC1325 will charge up to
) + (V
should be the greater voltage of the
DD
EC
EC
as shown in the circuit in the Typical
and Sense pins and the internal
) + 1.8V
supply must be greater than the
[R
) + V
R
)(f)(t
DS(ON)
SENSE
L
EC
L
), battery internal resistance
SENSE
RR
times the number of cells
(P1) + R
and V
)(I
.
F
)
DD
DS(ON)
SENSE
SENSE
source resis-
, inductor
to be ex-
+