LTC1287 LINER [Linear Technology], LTC1287 Datasheet - Page 12

• Manufacturer Part Number: LTC1287
• Description: 3V Single Chip 12-Bit Data Acquisition System
• Manufacturer: LINER [Linear Technology]

LTC1287
A
12
RC Input filtering
It is possible to filter the inputs with an RC network as
shown in Figure 11. For large values of C
capacitive input switching currents are averaged into a net
DC current. A filter should be chosen with a small resistor
and large capacitor to prevent DC drops across the resistor.
The magnitude of the DC current is approximately I
100pF V
running at the minimum cycle time of 33 s, the input
current equals 7.6 A at V
8 will cause 0.1LSB of full-scale error. If a large filter
resistor must be used, errors can be reduced by increasing
the cycle time as shown in the Typical Performance
Characteristics curve Maximum Filter Resistor vs Cycle
Time.
Input Leakage Current
Input leakage currents also can create errors if the source
resistance gets too large. For example, the maximum input
leakage specification of 1 A (at 85 C) flowing through a
source resistance of 1k will cause a voltage drop of 1mV
or 1.6LSB with V
reduced at lower temperatures because leakage drops
rapidly (see Typical Performance Characteristics curve
Input Channel Leakage Current vs Temperature).
SAMPLE-AND-HOLD
Single-Ended Input
The LTC1287 provides a built-in sample and hold (S&H)
function on the +IN input for signals acquired in the single
ended mode (–IN pin grounded). The sample and hold
allows the LTC1287 to convert rapidly varying signals (see
Typical Performance Characteristics curve of S&H
PPLICATI
IN
/t
V
CYC
IN
–
Figure 11. RC Input Filtering
O
and is roughly proportional to V
R
FILTER
REF
U
S
= 2.5V. This error will be much
I
DC
IN
I FOR ATIO
U
C
= 2.5V. Here a filter resistor of
FILTER
“+”
“–”
LTC1287
W
LTC1287 F11
F
(e.g., 1 F) the
U
IN
. When
DC
=
Acquisition Time vs Source Resistance). The input voltage
is sampled during the t
sampling interval begins at rising edge of CS and continues
until the falling edge of the CLK before the conversion
begins. On this falling edge the S&H goes into the hold
mode and the conversion begins.
Differential Input
With a differential input the A/D no longer converts a single
voltage but converts the difference between two voltages.
The voltage on the +IN pin is sampled and held and can be
rapidly time varying. The voltage on the –IN pin must
remain constant and be free of noise and ripple throughout
the conversion time. Otherwise the differencing operation
will not be done accurately. The conversion time is 12 CLK
cycles. Therefore a change in the –IN input voltage during
this interval can cause conversion errors. For a sinusoidal
voltage on the –IN input this error would be:
Where f
V
CLK. Usually V
signal on the –IN input to generate a 0.25LSB error
(150 V) with the converter running at CLK = 500kHz, its
peak value would have to be 16mV. Rearranging the above
equation, the maximum sinusoidal signal that can be
digitized to a given accuracy is given as:
For 0.25LSB error (150 V) the maximum input sinusoid
with a 2.5V peak amplitude that can be digitized is 0.4Hz.
Reference Input
The voltage on the reference input of the LTC1287
determines the voltage span of the A/D converter. The
reference input has transient capacitive switching cur-
rents due to the switched capacitor conversion tech-
nique (see Figure 12). During each bit test of the
PEAK
f
V
(
ERROR(MAX
IN MAX
is its peak amplitude and f
)
(–IN)
is the frequency of the –IN input voltage,
)
ERROR
V
ERROR MAX
2 V
2 f
PEAK
SMPL
will not be significant. For a 60Hz
(
(
IN PEAK
)
V
)
time as shown in Figure 8. The
CLK
f
12
CLK
f
is the frequency of the
12
CLK