FCMJ-8520-3 FINISAR [Finisar Corporation.], FCMJ-8520-3 Datasheet
FCMJ-8520-3
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FCMJ-8520-3 Summary of contents
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... The 1000BASE-T physical layer IC (PHY) can be accessed via I2C, allowing access to all PHY settings and features. The FCMJ-8520-3 uses the SFP’s RX_LOS pin for link indication, and 1000BASE-X auto-negotiation should be disabled on the host system. The FCMJ-8521-3 is compatible with 1000BASE-X auto-negotiation, but does not have a link indication feature (RX_LOS is internally grounded). See AN-2036, “ ...
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... T DIS 3. Should be pulled up with 4.7k – 10k Ohms on host board to a voltage between 2.0 V and 3.6 V. MOD_DEF(0) pulls line low to indicate module is plugged in. 4. LVTTL compatible with a maximum voltage of 2.5V. Not supported on FCMJ-8521-3. Table 1. SFP to host connector pin assignments and descriptions Towards Bezel Figure 1. Diagram of host board connector block pin numbers and names ...
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... FCMJ-8520/8521-3 1000BASE-T SFP Product Specification II. +3.3V Volt Electrical Power Interface The FCMJ-8520/8521-3 has an input voltage range of 3.3 V +/- 5%. The 4 V maximum voltage is not allowed for continuous operation. +3.3 Volt Electrical Power Interface Parameter Symbol Supply Current I Input Voltage V Maximum Voltage V max Surge Current I surge Caution: Power consumption and surge current are higher than the specified values in the SFP MSA Table 2 ...
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... FCMJ-8520/8521-3 1000BASE-T SFP Product Specification IV. High-Speed Electrical Interface All high-speed signals are AC-coupled internally. High-Speed Electrical Interface, Transmission Line-SFP Parameter Line Frequency Tx Output Impedance Rx Input Impedance Table 4. High-speed electrical interface, transmission line-SFP High-Speed Electrical Interface, Host-SFP Parameter Symbol Single ended data input ...
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... L Notes: 1. Clock tolerance is +/- 50 ppm 2. By default, the FCMJ-8520/8521 full duplex device in preferred master mode 3. Automatic crossover detection is enabled. External crossover cable is not required 4. 10/100/1000 BASE-T operation requires the host system to have an SGMII interface with no clocks, and the module PHY to be configured per Application Note AN-2036. ...
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... I C Clock Rate Table 8. Serial bus timing requirements VIII. Mechanical Specifications The host-side of the FCMJ-8520/8521-3 conforms to the mechanical specifications 1 outlined in the SFP MSA . The front portion of the SFP (part extending beyond the face plate of the host) is larger to accommodate the RJ-45 connector. See Figure 2 below for details ...
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... FCMJ-8520/8521-3 1000BASE-T SFP Product Specification IX. References 1. Small Form Factor Pluggable (SFP) Transceiver Multi-Source Agreement (MSA), September 2000. Documentation is currently available at Finisar upon request. 2. IEEE Std 802.3, 2002 Edition. IEEE Standards Department, 2002. 4. “AT24C01A/02/04/08/16 2-Wire Serial CMOS E www.Atmel.com 5. “Alaska Ultra 88E1111 Integrated 10/100/1000 Gigabit Ethernet Transceiver”, Marvell Corporation ...