AS1324 AMSCO [austriamicrosystems AG], AS1324 Datasheet - Page 14

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AS1324

Manufacturer Part Number
AS1324
Description
1.5MHz, 600mA, DC/DC Step-Down Regulator
Manufacturer
AMSCO [austriamicrosystems AG]
Datasheet

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AS1324
Data Sheet - A p p l i c a t i o n I n f o r m a t i o n
Figure 27. Setting the AS1324 Output Voltage
Resistor values for the circuit shown in
The output voltage can be adjusted by selecting different values for R
500k Ω is recommended. A higher resistance of R
ommended to keep V
Efficiency
The efficiency of a switching regulator is equivalent to:
For optimum design, an analysis of the AS1324 is needed to determine efficiency limitations and to determine design
changes for improved efficiency. Efficiency can be expressed as:
Where:
L
Althought all dissipative elements in the circuit produce losses, those four main sources should be considered for effi-
ciency calculation:
Input Voltage Quiescent Current Losses
The V
trol currents. V
rent loss dominates the efficiency loss at very low load currents.
I²R Losses
Most of the efficiency loss at medium to high load currents are attributed to I²R loss, and are calculated from the resis-
tances of the internal switches (R
flowing through inductor L is split between the internal switches. Therefore, the series resistance looking into the SW
pin is a function of both NMOS & PMOS R
The R
losses calculate as follows:
Switching Losses
The switching current is the sum of the control currents and the MOSFET driver. The MOSFET driver current results
from switching the gate capacitance of the power MOSFETs. If a MOSFET gate is switched from low to high to low
again, a packet of charge dQ moves from V
much larger than the DC bias current. In continuous mode:
Where: Q
The losses of the gate charges are proportional to V
ages.
Other Losses
www.austriamicrosystems.com
1
, L
2
, L
IN
DS(ON)
3
current is the DC supply current given in the electrical characteristics which excludes MOSFET driver and con-
, etc. are the individual losses as a percentage of input power.
PMOS
for both MOSFETs can be obtained from the
IN
and Q
current results in a small (<0.1%) loss that increases with V
IN
NMOS
500mV higher than V
are the gate charges of the internal MOSFET switches.
R
SW
SW)
= (R
Efficiency = 100% – (L
and the external inductor (R
AS1324
DS(ON)PMOS
Figure 27
I²R losses = I
Efficiency = (P
DS(ON)
I
GC
IN
OUT
to ground. The resulting dQ/dt is a current out of V
= f(Q
V
OUT
.
1
as well as the the duty cycle (DC) and can be calculated as follows:
can be calculated as:
)(DC) + (R
and R
PMOS
IN
5
V
2
GND
Revision 1.03
FB
=
OUT
and thus their effects will be more visible at higher supply volt-
OUT
0,6
2
²(R
+ Q
Electrical Characteristics on page
will result in a lower leakage current at the output. It is rec-
1
/P
×
DS(ON)NMOS
+ L
SW
NMOS
IN
1
)100%
2
+ R
+
0.6V ≤ V
+ L
L
). In continuous mode, the average output current
)
R
------ -
R
L
2
1
3
)
1
+ ...)
and R
)(1 – DC)
OUT
R
R
≤ 5.5V
2
1
IN
2
, even at no load. The V
. For R
R
1
<<R
1
2
a value between 10k Ω and
4. Thus, to obtain I²R
IN
that is typically
IN
quiescent cur-
(EQ 10)
(EQ 12)
(EQ 11)
14 - 20
(EQ 7)
(EQ 8)
(EQ 9)

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