AD524B AD [Analog Devices], AD524B Datasheet - Page 8

• Manufacturer Part Number: AD524B
• Description: Precision Instrumentation Amplifier
• Manufacturer: AD [Analog Devices]

AD524
Theory of Operation
The AD524 is a monolithic instrumentation amplifier based on
the classic 3 op amp circuit. The advantage of monolithic con-
struction is the closely matched components that enhance the
performance of the input preamp. The preamp section develops
the programmed gain by the use of feedback concepts. The
programmed gain is developed by varying the value of R
values increase the gain) while the feedback forces the collector
currents Q1, Q2, Q3 and Q4 to be constant, which impresses
the input voltage across R
Figure 28 Simplified Circuit of Amplifier; Gain Is Defined as
((R56 + R57)/(R
–IN
20V p-p
INPUT
11k
0.1%
CH
CH
CH
3
1
100k
, CH
0.1%
2
50 A
,
0.1%
1k
4
Figure 27. Settling Time Test Circuit
I
3
G
Q1, Q3
100
)) + 1. For a Gain of 1, R
0.1%
20k
R57
RG
I
50 A
1
C3
1
A1
4.44k
404
40
–V
+V
G
S
V
20k
B
.
S
R56
G100
G1000
A2
G = 1000
50 A
G = 100
RG
C4
1000
RG
G = 10
100
Q2, Q4
10
I
RG
RG
2
2
2
1
2
I
50 A
AD524
4
DUT
0.01%
10k
20k
AD524
G
R53
20k
CH
R54
Is an Open Circuit
–V
+V
–V
+V
CH
2
, CH
S
S
S
S
4
CH
1k
10T
20k
3
A3
20k
R52
R55
,
1
Figure 29. Noise Test Circuit
10k
0.1%
G
SENSE
G1000
V
REFERENCE
+IN
(smaller
1 F
O
16.2k
V
OUT
100
G1, 10, 100
–8–
1/2
+V
As R
conductance of the input preamp increases to the transconduct-
ance of the input transistors. This has three important advantages.
First, this approach allows the circuit to achieve a very high
open loop gain of 3 × 10
reducing gain-related errors to a negligible 30 ppm. Second, the
gain bandwidth product, which is determined by C3 or C4 and
the input transconductance, reaches 25 MHz. Third, the input
voltage noise reduces to a value determined by the collector
current of the input transistors for an RTI noise of 7 nV/√Hz at
G = 1000.
INPUT PROTECTION
As interface amplifiers for data acquisition systems, instrumen-
tation amplifiers are often subjected to input overloads, i.e.,
voltage levels in excess of the full scale for the selected gain
range. At low gains, 10 or less, the gain resistor acts as a current
limiting element in series with the inputs. At high gains the
lower value of R
excessive currents. Standard practice would be to place series
limiting resistors in each input, but to limit input current to
below 5 mA with a full differential overload (36 V) would re-
quire over 7k of resistance which would add 10 nV√Hz of noise.
To provide both input protection and low noise a special series
protect FET was used.
A unique FET design was used to provide a bidirectional cur-
rent limit, thereby, protecting against both positive and negative
overloads. Under nonoverload conditions, three channels CH
CH
before. During an overload in the positive direction, a fourth
channel, CH
the gate, which draws only the leakage current, and the FET
limits I
the gate current must go through the small FET formed by CH
and when this FET goes into saturation, the gate current is
limited and the main FET will go into controlled enhancement.
The bidirectional limiting holds the maximum input current to
3 mA over the 36 V range.
INPUT OFFSET AND OUTPUT OFFSET
Voltage offset specifications are often considered a figure of
merit for instrumentation amplifiers. While initial offset may be
adjusted to zero, shifts in offset voltage due to temperature
variations will cause errors. Intelligent systems can often correct
for this factor with an autozero cycle, but there are many small-
signal high-gain applications that don’t have this capability.
s
3
, CH
G
is reduced to increase the programmed gain, the trans-
AD712
9.09k
1k
DSS
1 F
4
. When the FET enhances under a negative overload,
, act as a resistance ( 1 k ) in series with the input as
1
, acts as a small resistance ( 3 k ) in series with
1.62M
G
will not adequately protect the inputs from
1/2
–V
S
8
at a programmed gain of 1000, thus
1 F
16.2k
1.82k
REV. E
2
,
1