ADR391A AD [Analog Devices], ADR391A Datasheet - Page 15

• Manufacturer Part Number: ADR391A
• Description: Micropower, Low Noise Precision Voltage References with Shutdown
• Manufacturer: AD [Analog Devices]

APPLICATIONS INFORMATION
BASIC VOLTAGE REFERENCE CONNECTION
The circuit shown in Figure 34 illustrates the basic configuration
for the ADR39x family. Decoupling capacitors are not required
for circuit stability. The ADR39x family is capable of driving
capacitive loads from 0 μF to 10 μF. However, a 0.1 μF ceramic
output capacitor is recommended to absorb and deliver the
charge, as required by a dynamic load.
Stacking Reference ICs for Arbitrary Outputs
Some applications may require two reference voltage sources,
which are a combined sum of standard outputs. Figure 35 shows
how this stacked output reference can be implemented.
Figure 35. Stacking Voltage References with the ADR391/ADR392/ADR395
SHUTDOWN
*NOT REQUIRED
V
IN
INPUT
Figure 34. Basic Configuration for the ADR39x Family
C
B
0.1µF
0.1µF
ADR391/ADR391
ADR392/ADR392
ADR395/ADR395
*
0.1µF
C2
C2
U1/U2
OUTPUT TABLE
SHDN
SHDN
SHDN
V
V
V
V
V
V
IN
OUT (SENSE)
V
2.5
4.096
5
OUT (FORCE)
OUT (SENSE)
OUT (FORCE)
OUT (SENSE)
OUT1
ADR39x
V
GND
GND
OUT (FORCE)
V
V
IN
IN
(V) V
U2
U1
GND
5.0
8.192
10
OUT2
C
(V)
B
*
0.1µF
OUTPUT
V
V
OUT2
OUT1
Rev. H | Page 15 of 20
Two reference ICs are used, fed from an unregulated input, V
The outputs of the individual ICs are connected in series, which
provide two output voltages, V
terminal voltage of U1, while V
and the terminal voltage of U2. U1 and U2 are chosen for the
two voltages that supply the required outputs (see the Output
Table in Figure 35). For example, if both U1 and U2 are ADR391s,
V
While this concept is simple, a precaution is required. Because
the lower reference circuit must sink a small bias current from
U2 plus the base current from the series PNP output transistor
in U2, either the external load of U1 or an external resistor must
provide a path for this current. If the U1 minimum load is not
well defined, the external resistor should be used and set to a
value that conservatively passes 600 μA of current with the
applicable V
reference circuits are treated locally as macrocells; each has its
own bypasses at input and output for best stability. Both U1 and
U2 in this circuit can source dc currents up to their full rating.
The minimum input voltage, V
the outputs, V
A Negative Precision Reference without Precision Resistors
A negative reference can be easily generated by adding an A1
op amp and is configured as shown in Figure 36. V
and V
reference can be taken directly from the output of the op amp.
The op amp must be dual-supply, low offset, and rail-to-rail if
the negative supply voltage is close to the reference output.
OUT1
is 2.5 V and V
OUT (SENSE)
OUT1
OUT2
are at virtual ground and, therefore, the negative
across it. Note that the two U1 and U2
–V
A1
, plus the dropout voltage of U2.
DD
Figure 36. Negative Reference
OUT2
ADR391/ADR392/ADR395
is 5.0 V.
V
V
OUT (FORCE)
OUT (SENSE)
OUT1
+V
IN
GND
OUT2
V
, is determined by the sum of
IN
DD
SHDN
and V
is the sum of this voltage
OUT2
–V
. V
REF
OUT1
OUT (FORCE)
is the
IN
.