35C RENESAS [Renesas Technology Corp], 35C Datasheet - Page 13

• Manufacturer Part Number: 35C
• Description: RENESAS MCU
• Manufacturer: RENESAS [Renesas Technology Corp]

R8C/35C Group
R01DS0006EJ0100 Rev 1.00
Aug. 24, 2010
2.8.7
2.8.8
2.8.9
2.8.10
The I flag enables maskable interrupts.
Interrupts are disabled when the I flag is set to 0, and are enabled when the I flag is set to 1. The I flag is set to 0
when an interrupt request is acknowledged.
ISP is selected when the U flag is set to 0; USP is selected when the U flag is set to 1.
The U flag is set to 0 when a hardware interrupt request is acknowledged or the INT instruction of software
interrupt numbers 0 to 31 is executed.
IPL is 3 bits wide and assigns processor interrupt priority levels from level 0 to level 7.
If a requested interrupt has higher priority than IPL, the interrupt is enabled.
If necessary, set to 0. When read, the content is undefined.
Interrupt Enable Flag (I)
Stack Pointer Select Flag (U)
Processor Interrupt Priority Level (IPL)
Reserved Bit
2. Central Processing Unit (CPU)
Page 13 of 54