h8s-2110b Renesas Electronics Corporation., h8s-2110b Datasheet - Page 476

• Manufacturer Part Number: h8s-2110b
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

Section 18 Clock Pulse Generator
18.4
The bus master clock select circuit selects a clock to supply the bus master with either the system
clock ( ) or medium-speed clock ( /2, /4, /8, /16, or /32) by the SCK2 to SCK0 bits in
SBYCR.
18.5
The subclock input circuit controls subclock input from the EXCL pin. To use the subclock, a
32.768-kHz external clock should be input from the EXCL pin. At this time, the P96DDR bit in
P9DDR should be cleared to 0, and the EXCLE bit in LPWRCR should be set to 1.
Subclock input conditions are shown in table 18.5. When the subclock is not used, subclock input
should not be enabled.
Table 18.5 Subclock Input Conditions
Item
Subclock input pulse width
low level
Subclock input pulse width
high level
Subclock input rising time
Subclock input falling time
When Subclock Is Not Needed: Do not enable subclock input when the subclock is not needed.
Note on Subclock Usage:
32-kHz clock are not input after the 32-kHz clock input is enabled (EXCLE = 1) until the
Rev. 2.00 Mar 21, 2006 page 438 of 518
REJ09B0299-0200
Bus Master Clock Select Circuit
Subclock Input Circuit
EXCL
t
EXCLr
In transiting to power-down mode, if at least two cycles of the
Symbol
t
t
t
t
EXCLL
EXCLH
EXCLr
EXCLf
Figure 18.7 Subclock Input Timing
t
EXCLH
Vcc = 2.7 to 3.6 V
Min
—
—
—
—
Typ
15.26
15.26
—
—
t
EXCLf
t
EXCLL
Max
—
—
10
10
Unit
ns
ns
V
s
s
CC
× 0.5
Measurement
Condition
Figure 18.7