CS42416_05 CIRRUS [Cirrus Logic], CS42416_05 Datasheet - Page 56

• Manufacturer Part Number: CS42416_05
• Description: 110 dB, 192 kHz 6-Ch Codec with PLL
• Manufacturer: CIRRUS [Cirrus Logic]

56
6.17.2 DE-EMPHASIS SELECT BITS (DE-EMPHX)
6.17.3 INTERRUPT PIN CONTROL (INTX)
6.18
For all bits in this register, a “1” means the associated interrupt condition has occurred at least once since the reg-
ister was last read. A ”0” means the associated interrupt condition has NOT occurred since the last reading of the
register. Reading the register resets all bits to 0. Status bits that are masked off in the associated mask register will
always be “0” in this register.
6.18.1 PLL UNLOCK (UNLOCK)
6.18.2 ADC OVERFLOW (OVERFLOW)
UNLOCK
7
Interrupt Status (address 20h) (Read Only)
Default = 00
00 - Reserved
01 - De-Emphasis for 32 kHz sample rate.
10 - De-Emphasis for 44.1 kHz sample rate.
11 - De-Emphasis for 48 kHz sample rate.
Function:
Used to specify which de-emphasis filter to apply when the
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Default = 00
00 - Active high; high output indicates interrupt condition has occurred
01 - Active low; low output indicates an interrupt condition has occurred
10 - Open drain, active low. Requires an external pull-up resistor on the INT pin.
11 - Reserved
Function:
Determines how the interrupt pin (INT) will indicate an interrupt condition.
Default = 0
Function:
PLL unlock status bit. This bit will go high if the PLL becomes unlocked.
Default = 0
Function:
Indicates that there is an over-range condition anywhere in the CS42416 ADC signal path.
Reserved
6
is enabled.
Reserved
5
Reserved
4
Reserved
3
“Force PLL Lock (FRC_PLL_LK)” on
Reserved
2
OverFlow
1
CS42416
Reserved
DS602F1
0