CS8126-2GT5 CHERRY [Cherry Semiconductor Corporation], CS8126-2GT5 Datasheet - Page 2

• Manufacturer Part Number: CS8126-2GT5
• Description: 5V, 750mA Low Dropout Linear Regulator with Delayed RESET
• Manufacturer: CHERRY [Cherry Semiconductor Corporation]

Delay Time =
Note 1: assumes ideal capacitor
Power Dissipation.............................................................................................................................................Internally Limited
Peak Transient Voltage (46V Load Dump) .................................................................................................................-50V, 60V
Output Current .................................................................................................................................................Internally Limited
ESD Susceptibility (Human Body Model)..............................................................................................................................4kV
Junction Temperature .............................................................................................................................................-40¡C to 150¡C
Storage Temperature...............................................................................................................................................-55¡C to 150¡C
Lead Temperature Soldering Wave Solder (through hole styles only) ..........................................10 sec. max, 260¡C peak
Output Stage (V
Output Voltage
Dropout Voltage
Supply Current
Line Regulation
Load Regulation
Ripple Rejection
Current Limit
Overvoltage Shutdown
Maximum Line Transient
Reverse Polarity Input
Reverse Polarity Input
Thermal Shutdown
Delay Charge Current
Delay Threshold
Delay Hysteresis
Current
Delay Capacitor
Delay Time
RESET
RESET
RESET
RESET
RESET
Voltage DC
Voltage Transient
Discharge Voltage
PARAMETER
Electrical Characteristics: T
Threshold
Hysteresis
Output Voltage Low
Output Leakage
and Delay Functions
C
Delay
´ V
OUT
Delay
)
I
Charge
Threshold Charge
Reflow (SMD styles only) ..........................................60 sec. max above 183¡C, 230¡C peak
I
I
I
I
V
I
f = 120Hz, V
V
V
1% Duty Cycle, T < 100ms,
10½ Load
Guaranteed by Design
V
V
V
V
Charge, V
Discharge, V
1V < V
V
Discharge Latched ÒONÓ,
V
C
R
I
OUT
OUT
OUT
OUT
OUT
OUT
IN
OUT
OUT
Delay
OUT
OUT
RH
OUT
OUT
Delay
A
RESET
= -40ûC to +125ûC, T
= 6 to 26V, I
= V
TEST CONDITIONS
= 500mA
² 10mA
² 100mA
² 500mA
= 50 to 500mA, V
= 250mA
² 5.5V
³ -0.6V, 10½ Load
Increasing, V
Decreasing, V
> V
> V
= 2V
= 0.1µF* (Note 1)
OUT
= 4.7k½ to V
RT(ON)
RT(ON)
RT
Absolute Maximum Ratings
DC(HI)
< V
= C
IN
DC(LO)
- V
RTL
= 7 to 17V,
Delay
OUT
RT(OFF)
, 3k½ to V
RT(ON)
RT(OFF)
x 3.2 x 10
= 50mA
CC,
IN
2
unless otherwise noted.
J
= 14V
= -40ûC to +150ûC, V
OUT
5
(typ)
MIN
4.85
0.75
4.65
4.50
3.25
2.85
150
150
200
-15
54
32
16
5
IN
= 6 to 26V, I
TYP
5.00
0.35
1.20
4.90
4.70
3.50
3.10
200
180
400
-30
-80
0.1
0.2
55
10
75
95
10
32
2
6
5
0
O
=5 to 500mA,
V
V
OUT
OUT
5.15
0.60
3.75
3.35
100
210
250
800
MAX
0.4
0.5
12
50
50
40
15
10
48
7
- 0.01
- 0.15
mA
mV
mV
mV
mV
UNIT
µA
µA
ms
dB
¡C
A
V
V
V
V
V
V
V
V
V
V
V
V