ssd1800 ETC-unknow, ssd1800 Datasheet - Page 12

• Manufacturer Part Number: ssd1800
• Description: 80x16 + 1 Icon Line Lcd Segment / Common Driver With Controller For Character Display System
• Manufacturer: ETC-unknow

7
7.1 D/
When the pin is pulled low, the data at D
7.2 R/
as R/W signal input. Read mode will be carried out when this pin is pulled high and write mode when low.
this pin is pulled low and the chip is selected.
7.3 DVDD & AVDD
Digital and Analog Power supply pin.
7.4 DVSS & AVSS
Ground.
7.5 E(
as the enable signal, E. Read/ Write operation is initiated when this pin is pulled high and the chip is selected.
this pin is pulled low and the chip is selected.
7.6
This pin is the chip select input.
7.7 D
In 8-bit bus mode, D
D
D
D
considers first 4-bit data from MPU as the high order bits.
be fixed to high or low in serial mode
Solomon Systech
7
3
4
-D
-D
) in read transaction. The D
This pin is Data/ Command control pin. When the pin is pulled high, the data at D
This pin is microprocessor interface input. When interfacing to a 6800-series microprocessor, this pin will be used
When interfacing to a 8080-microprocessor, this pin will be the WR input. Data write operation is initiated when
This pin must be fixed to high or low in serial mode.
This pin is microprocessor interface input. When interfacing to a 6800-series microprocessor, this pin will be used
When interfacing to a 8080-microprocessor, this pin receives the RD signal. Data read operation is initiated when
This pin must be fixed to high or low in serial mode.
These pins are the 8-bit bi-directional data bus to be connected to the microprocessor in parallel interface mode.
When serial mode is selected, D
4
0
CS
) by two times. The high order bits (for 8-bit mode D
) in write transaction and low order bits (8-bit mode D
7
PIN DESCRIPTIONS
W
-D
C
RD
(
0
)
WR
)
7
is the MSB while D
3
-D
0
7
pins must be fixed to high or low in 4-bit bus mode. After resets, SSD1800
is the serial data input (SDA) and D
7
-D
0
is the LSB. In 4-bit bus mode, it is needed to transfer 4-bit data (through
0
will be transferred to the command register.
7
-D
3
-D
4
0
) are written before the low order bits (for 8-bit mode
) are read before the high order bits (8-bit mode D
Mar 2004
6
is the serial clock input (SCK). D5-D0 must
P 12/42 Rev 1.0
7
-D
0
is treated as display data.
SSD1800 Series
7
-