ak8825 AKM Semiconductor, Inc., ak8825 Datasheet - Page 14

• Manufacturer Part Number: ak8825
• Description: Hd/sd Multi Format Video Encoder With 3ch Dac
• Manufacturer: AKM Semiconductor, Inc.

Power A: AVDD D: DVDD P1: PVDD1 P2: PVDD2
I/O: Input/Output pin I: Input pin O: Output pin G: Ground pin P: Power Supply pin
Pull Up / Down Pins
Rev-E-00
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
DVSS
DATA16
PVDD2
DATA17
VDI
HDI
CLKIN
HDO
VDO
TEST1
FLT
DACO3
DACO2
DACO1
AVSS
AVDD
VREF
BYPASS
BVSS
IREF
TEST0
P2
P2
P2
P2
P2
P2
P2
P2
D
A
A
A
A
A
A
A
A
A
A
I
I
I/O
I/O
I/O
I/O
P2
P1
G
O
O
O
O
O
O
G
O
G
O
P
P
I
I
Ground pins for Digital.
Data Input pin
Refer “Data input Format”.
In case of PDN pin = Low, Hi-z states is possible.
Power supply pins for I/O(CLKIN, DATA[17:0], HDI, VDI)
Data Input pin
Refer “Data input Format”.
In case of PDN pin = Low, Hi-z states is possible.
In case of slave Synchronization operation mode, Vertical Sync timing should be
input.
In case of PDN pin = Low, Hi-z states is possible.
In case of slave Synchronization operation mode, Horizontal Sync timing should be
input.
In case of PDN pin = Low, Hi-z states is possible.
Clock Input Pin
Composite Video Encoder Mode: Input 27MHz Clock.
Component Video Encoder Mode: Either 27MHz or 74.25MHz clock is input.
(Depending on Input Video Format)
High Speed Video DAC Mode: Max input clock is 54MHz.
Prohibited Hi-z States
Horizontal Sync Timing signal output pin.
In case of PDN pin = Low, this pin outputs Low.
Vertical Sync Timing signal output pin.
In case of PDN Pin = Low, this pin outputs Low.
TEST pin.
Connect to DVSS.
(Internally Pull-down with approx. 100k-ohm)
Filter Pin for PLL
DAC3 output pin. Output signal is set by register
Composite Video Encoder mode:
Pr or R
Component Video Encoder mode:
CVBS
High Speed Video DAC mode:
Depending on Input data.
Load resistor is 300-ohm
DAC2 output pin. Output signal is set by register
Composite Video Encoder mode:
Pb or B
Component Video Encoder mode:
C
High Speed Video DAC mode:
Depending on Input data.
Load resistor is 300-ohm
DAC1 output pin. Output signal is set by register
Composite Video Encoder mode:
Y or CVBS
Component Video Encoder mode:
Y or G
High Speed Video DAC mode:
Depending on Input data.
Load resistor is 300-ohm
Ground pin for Analog
Power supply pin for Analog.
to be connected to AVDD via a 0.1 uF capacitor
Output pin to output On-Chip VREF voltage.
Should be connected to AVSS via a larger-than 0.1 uF capacitor.
Ground pin for Substrate.
Connect to AVSS.
Reference Current Output pin for DAC
Should be connected to AVSS via a 3.3 K ohm ( +/- 1 % ) resistor.
TEST pin.
Connect to DVSS.
(Internally Pull-down with approx. 100k-ohm)
14
2008/03
[AK8825]