m12l16161a Elite Semiconductor Memory Technology Inc., m12l16161a Datasheet - Page 6
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m12l16161a
Manufacturer Part Number
m12l16161a
Description
512k X 16bit X 2banks Synchronous Dram
Manufacturer
Elite Semiconductor Memory Technology Inc.
Datasheet
1.M12L16161A.pdf
(29 pages)
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AC CHARACTERISTICS (AC operating conditions unless otherwise noted)
CLK cycle time
CLK to valid
output delay
Output data hold time
CLK high pulse width
CLK low pulse width
Input setup time
Input hold time
CLK to output in Low-Z
CLK to output in
Hi-Z
Note: 1.Parameters depend on programmed CAS latency.
Elite Semiconductor Memory Technology Inc.
2.If clock rising time is longer than 1ns,(tr/2-0.5)ns should be added to the parameter.
3.Assumed input rise and fall time (tr & tf)=1ns.
If tr & tf is longer than 1ns, transient time compensation should be considered, i.e., [(tr+ tf)/2-1]ns should be added to the
parameter.
Parameter
CAS Latency =3
CAS Latency =2
CAS Latency =3
CAS Latency =2
CAS Latency =3
CAS latency =2
Symbol
t
t
t
t
t
t
t
t
t
CC
SAC
OH
CH
CL
SS
SH
SLZ
SHZ
Min
5
7
2
2
2
2
1
1
-
-
-
-
-5
1000
Max
4.5
5.5
5.5
5
*All AC parameters are measured from half to half.
Min
8.6
2.5
2.5
7
2
2
1
1
-
-
-
-
-7
1000
Max
6
6
6
6
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
Revision : 2.7
Publication Date : Sep. 2008
M12L16161A
Note
1
1
2
3
3
3
3
2
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