apa2020 Anpec Electronics Corporation, apa2020 Datasheet - Page 18

• Manufacturer Part Number: apa2020
• Description: Stereo 2-w Audio Power Amplifier
• Manufacturer: Anpec Electronics Corporation

APA2020
Pin Description
Test Information
Copyright
Rev. A.9 - Sep., 2008
4.7 F
SHUTDOWN
MUTE OUT
C
RBYPASS
LBYPASS
MUTE IN
I
GND/HS
HP/LINE
RLINEIN
LLINEIN
LOUT +
SE/BTL
ROUT+
LOUT -
ROUT-
RHPIN
NAME
RVDD
LVDD
LHPIN
NC
TJ
R
R
F
I
C
B
ANPEC Electronics Corp.
PIN
Figure 1. BTL Test Circuit
MUX
NO.
13,24
17,23
1,12,
10
14
15
16
18
19
20
21
22
11
2
3
4
5
6
7
8
9
HP/LINE
SE/BTL
I/O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
Ground connection for circuitry, directly connected to thermal pad (only in TSSOP-P
package).
Shutdown mode control signal input, sources a current proportional to the junction
temperature. This pin should be left unconnected during normal operation. For more
information, see the junction temperature measurement section of this document.
Left channel + output in BTL mode, + output in SE mode.
Left channel line input, selected when HP/LINE pin (16) is held low.
Left channel headphone input, selected when HP/LINE pin (16) is held high.
Connect to voltage divider for left channel internal mid-supply bias.
Supply voltage input for left channel and for primary bias circuits.
Shutdown mode control signal input, places entire IC in shutdown mode when held
high, I
Follows MUTE in pin (11), provides buffered output.
Left channel - output in BTL mode, high-impedance state in SE mode.
Mute control signal input, hold low for normal operation, hold high to mute.
Mode control signal input, hold low for BTL mode, hold high for SE mode.
Right channel - output in BTL mode, high impedance state in SE mode.
MUX control input, hold high to select headphone inputs (5,20), hold low to select line
inputs (4,21).
No internal connection.
Supply voltage input for right channel.
Connect to voltage divider for right channel internal mild-supply bias.
Right channel headphone input, selected when HP/LINE pin (16) is held high.
Right channel line input, selected when HP/LINE pin (16) is held low.
Right channel + output in BTL mode, + output in SE mode.
R
L
=4
SD
= 0.5 A.
, 8
or
18
4.7 F
C
I
R
R
I
F
C
B
Figure 2. SE Test Circuit
FUNCTION
MUX
SE/BTL
HP/LINE
V
DD
C
www.anpec.com.tw
O
R
L
= 4
or 32
8