DS90LV028 NSC [National Semiconductor], DS90LV028 Datasheet - Page 3

• Manufacturer Part Number: DS90LV028
• Description: 3V LVDS Dual CMOS Differential Line Receiver
• Manufacturer: NSC [National Semiconductor]

Switching Characteristics
Note 9: t
integrated circuit.
Note 10: t
and within 5˚C of each other within the operating temperature range.
Note 11: t
mended operating temperature and voltage ranges, and across process distribution. t
Note 12: V
than 100 mV when V
Note 13: f
V
Parameter Measurement Information
Typical Application
Applications Information
General application guidelines and hints for LVDS drivers
and receivers may be found in the following application
notes: LVDS Owner’s Manual (lit #550062-001), AN808,
AN1035, AN977, AN971, AN916, AN805, AN903.
LVDS drivers and receivers are intended to be primarily used
in an uncomplicated point-to-point configuration as is shown
in Figure 3 . This configuration provides a clean signaling en-
vironment for the fast edge rates of the drivers. The receiver
is connected to the driver through a balanced media which
may be a standard twisted pair cable, a parallel pair cable, or
simply PCB traces. Typically the characteristic impedance of
the media is in the range of 100 . A termination resistor of
OL
(max 0.4V), V
SKD2
SKD3
MAX
SKD4
CC
is the differential channel-to-channel skew of any event on the same device. This specification applies to devices having multiple receivers within the
, part to part skew, is the differential channel-to-channel skew of any event between devices. This specification applies to devices at the same V
is always higher than R
generator input conditions: t
, part to part skew, is the differential channel-to-channel skew of any event between devices. This specification applies to devices over the recom-
OH
CM
(min 2.7V), load = 15 pF (stray plus probes).
= 0V or 3V.
FIGURE 1. Receiver Propagation Delay and Transition Time Test Circuit
FIGURE 2. Receiver Propagation Delay and Transition Time Waveforms
IN
+ and R
r
= t
f
<
IN
1 ns (0% to 100%), 50% duty cycle, differential (1.05V to 1.35 peak to peak). Output criteria: 60%/40% duty cycle,
− voltage. R
FIGURE 3. Point-to-Point Application
(Continued)
IN
+ and R
Balanced System
IN
− are allowed to have voltage range −0.05V to +3.05V. V
3
SKD4
100 should be selected to match the media, and is located
as close to the receiver input pins as possible. The termina-
tion resistor converts the driver output (current mode) into a
voltage that is detected by the receiver. Other configurations
are possible such as a multi-receiver configuration, but the
effects of a mid-stream connector(s), cable stub(s), and
other impedance discontinuities as well as ground shifting,
noise margin limits, and total termination loading must be
taken into account.
The DS90LV028A differential line receiver is capable of de-
tecting signals as low as 100 mV, over a
range centered around +1.2V. This is related to the driver off-
is defined as |Max − Min| differential propagation delay.
DS100077-3
DS100077-5
DS100077-4
ID
is not allowed to be greater
±
1V common-mode
www.national.com
CC