UPD70F3102-33 NEC [NEC], UPD70F3102-33 Datasheet - Page 46
UPD70F3102-33
Manufacturer Part Number
UPD70F3102-33
Description
32-/16-BIT SINGLE-CHIP MICROCONTROLLER
Manufacturer
NEC [NEC]
Datasheet
1.UPD70F3102-33.pdf
(82 pages)
- Current page: 46 of 82
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Remarks 1. T = t
46
Data input setup time (to CLKOUT )
Data input hold time (from CLKOUT )
Delay time from OE to data output
Column address setup time
Column address hold time
RAS hold time
Column address read time for RAS
CAS pulse width
WE setup time (to CAS )
WE hold time (from RAS )
WE hold time (from CAS )
Output enable access time
Access time from column address
CAS access time
Output buffer turn-off delay time
(from OE )
Output buffer turn-off delay time
(from CAS )
Access time from CAS precharge
CAS precharge time
High-speed page mode cycle time
RAS hold time from CAS precharge
(b) Read timing (high-speed DRAM access: on-page) (1/2)
2. w
3. w
4. i: Number of idle states inserted when a write cycle follows the read cycle.
Parameter
CP
DA
: Number of waits specified by CPCxx bit of register DRCn (n = 0 to 3, xx = 00 to 03, 10 to 13)
: Number of waits specified by DACxx bit of register DRCn (n = 0 to 3, xx = 00 to 03, 10 to 13)
CYK
<26>
<27>
<37>
<58>
<59>
<63>
<64>
<65>
<68>
<69>
<70>
<72>
<74>
<75>
<78>
<79>
<80>
<81>
<82>
<83>
Symbol
Preliminary Data Sheet U13844EJ2V0DS00
t
DRDOD
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
RHCP
SKID
HKID
t
t
t
ASC
CAH
RSH
CAS
RCS
RRH
RCH
OEA
CAC
OEZ
OFF
ACP
RAL
AA
CP
PC
Conditions
(2 + w
(2 + w
(2.5 + w
(0.5 + w
(1.5 + w
(1.5 + w
(1 + w
(1 + w
(1 + w
(0.5 + i) T – 10
0.5 T – 10
CP
CP
CP
T – 10
MIN.
+ w
+ w
DA
CP
CP
18
+ w
CP
DA
DA
2
0
0
) T – 10
) T – 10
) T – 10
) T – 10
) T – 10
) T – 10
DA
DA
DA
) T – 10
) T – 10
) T – 10
(2 + w
(1 + w
(1.5 + w
(1 + w
CP
CP
CP
MAX.
+ w
+ w
DA
+ w
) T – 28
DA
DA
DA
) T – 28
) T – 28
PD70F3102-33
) T – 28
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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