UPD70433GD-16-5BB NEC [NEC], UPD70433GD-16-5BB Datasheet - Page 20
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UPD70433GD-16-5BB
Manufacturer Part Number
UPD70433GD-16-5BB
Description
V55PITM 16-BIT MICROPROCESSOR
Manufacturer
NEC [NEC]
Datasheet
1.UPD70433GD-16-5BB.pdf
(166 pages)
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3.2.3
indexed addressing (IX, IY), based indexed addressing (BP, IX, IY), etc. The SP is also used as the pointer in stack
operations. As with general registers, these are used with transfer instructions, arithmetic operation instructions, etc., but
in this case they cannot be used as 8-bit registers. Each register is also used as the fixed address pointer for specific
instruction processing, as shown below.
the offset for each register to (register bank number
3.2.4
address of each segment with a segment register, and uses another register or effective address for the specification of
phyiscal address, with the relative address from the start address as the offset.
Segment 1). The respective segments are used in the following cases.
These are 16-bit registers used as base pointers or index registers in memory accesses using based addressing (BP),
These registers are mapped onto the register file space (in on-chip RAM). The address is the value obtained by adding
The CPU manages the 1M-byte basic memory space by dividing it into 64K-byte units. The CPU specifies the start
The physical address is created as shown below.
There are four segment registers: PS (Program Segment), SS (Stack Segment), DS0 (Data Segment 0), and DS1 (Data
+
Segment Register 4-Bit Fixed
Pointers (SP, BP) and Index Registers (IX, IY)
Segment Registers (PS, SS, DS0, DS1)
SP : Stack manipulation
IX : Block transfers, BCD operation source side address specification
IY : Block transfers, BCD operation destination side address specification
x
0
x
PS : Program fetch
SS : Stack manipulation instructions, addressing using BP as base register
DS0 : General variable accesses, source block data accesses such as block transfer instructions, etc.
DS1 : Destination block data accesses such as block transfer instructions, etc.
x
x
x
x
x
x
x
x
x
0
x
x
H
H
H
Table 3-2. Pointer and Index Register Offsets
.....
....
....
Segment Start Address
Offset Value
Physical Address (20 Bits)
Register
SP
BP
IX
IY
32).
Offset
16H
14H
12H
10H
PD70433