UPD6133GS NEC [NEC], UPD6133GS Datasheet - Page 59
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UPD6133GS
Manufacturer Part Number
UPD6133GS
Description
4-BIT SINGLE-CHIP MICROCONTROLLER FOR INFRARED REMOTE CONTROL TRANSMISSION
Manufacturer
NEC [NEC]
Datasheet
1.UPD6133GS.pdf
(64 pages)
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APPENDIX B. FUNCTIONAL COMPARISON BETWEEN
ROM capacity
RAM capacity
Stack
Key matrix
S
S
Clock frequency
Timer
Carrier
Instruction execution time
Relative branch instruction
Left shift instrucion
“MOV Rn, @R0” instrucion
Standby mode
(HALT instruction)
Relation between HALT
instruction execution and
status flag (F)
Reset function by charging/
discharging capacitor
POC circuit
Mask option
Supply voltage
Operating temperature
Package
One-time PROM product
0
1
/LED (S-OUT)
(S-IN) input
Clock
Count start
Frequency
Output start
Item
SUBSERIES
512
32
1 level (multiplexed with RF of RAM)
8
Read by P
release standby mode)
I/O (with function to release standby mode)
Ceramic oscillation
• f
• f
f
Writing count value
• f
• f
• No carrier
Synchronized with timer
8 s (f
None
None
n = 1 to F
HALT mode for timer only.
STOP mode for only releasing K
(K
output)
HALT instruction not executed when F = 1
None
Mask option
Low level output to RESET pin on detection
POC circuit only
(Circuits other than POC circuit are set
by software.)
V
• T
• T
• 20-pin plastic
X
PD61P34B
DD
SOP
/8, f
(with POC circuit)
I/O
X
X
X
X
A
A
6 = 48 keys
, f
/2, f
= 1.8 to 3.6 V
= 300 kHz to 1 MHz
= 300 to 500 kHz
= –40 to +85 C
= –20 to +70 C (with POC circuit)
high-level output or K
4 bits
X
PD6133
X
10 bits
/16
X
/8, f
X
= 1 MHz)
/16, f
01
X
/12 (timer clock: f
Data Sheet U10454EJ6V0DS00
register (with function to
X
/24 (timer clock: f
1002
• 20-pin plastic SOP • 20-pin plastic SOC
• 20-pin plastic SSOP • 20-pin plastic shrink DIP
I/O0
PD6134
10 bits
X
high-level
/8)
I
X
/16)
PD6133 SUBSERIES AND OTHER
512
32
3 levels (multiplexed with RAM)
8
Read by left shift instruction
Output
Ceramic oscillation
• f
f
Writing count value and P1 register value
• f
Not synchronized with timer
16 s (f
Provided
Provided
n = 0 to F
HALT/STOP mode set by P1 register
value
HALT instrucion executed regardless of
status of F
Provided
Provided (low-voltage detection circuit)
Low level ouput to S-OUT pin on detection
• Pull-down resistor
• Variable duty
• Hang-up detection
• V
• T
X
PD61P24
/8
X
X
DD
A
/8, f
4 = 32 keys
= –20 to +70 C
= 400 to 500 kHz
5 bits
= 2.2 to 3.6 V
PD6600A
10 bits
X
X
/12
= 500 kHz)
PD6133, 6134
1002
• V
DD
PD6124A
= 2.2 to 5.5 V
10 bits
59