DS1077 DALLAS [Dallas Semiconductor], DS1077 Datasheet
DS1077
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DS1077 Summary of contents
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... Pre-programmed devices can be ordered in customer- requested frequencies. The DS1077 is available in 8-pin SO or µSOP packages, allowing the generation of a clock signal easily, economically, and using minimal board area. Chip-scale packaging is also available on request. EconOscillator is a trademark of Dallas Semiconductor. ...
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... CONTROL REGISTERS 2-WIRE INTERFACE SDA SCL SEL0 EN0 PDN0 MUX P0 PRESCALER (M DIVIDER) 0M1 0M0 P1 PRESCALER (M DIVIDER) Power-Down 1M1 1M0 PDN1 CONTROL LOGIC (TABLE 1) Enable Select Power-Down DIV1 PROGRAMMABLE “N” DIVIDER Enable CONTROL LOGIC (TABLE 2) DS1077 CTRL0 OUT0 OUT1 CTRL1 ...
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... OVERVIEW A block diagram of the DS1077 is shown in Figure 1. The DS1077 consists of four major components: 1) Internal Master Oscillator, 2) Prescalers, 3) Programmable Divider, and 4) Control Registers. The internal oscillator is factory-trimmed to provide a master frequency (Master CLK) that can be routed directly to the outputs (OUT0 & OUT1) or through separate prescalers (P0 & P1). OUT1 can also be routed through an additional divider (N) ...
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DEVICE MODE USING OUT0 Table 1 EN0 SEL0 PDN0 (BIT) (BIT) (BIT *This mode is for applications where OUT0 is not used, ...
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SHUTDOWN CONTROL WITH PDN0 AND PDN1 Table 3 PDN0 PDN1 (BIT) (BIT *CTRL0 performs a power-down if SEL0 and EN0 are both 0 (see Table 1). REGISTER FUNCTIONS The user programmable registers ...
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EN0 (bit EN0 = 1 and PDN0 = 0 the CTRL0 pin functions as an Output Enable for OUT0, the frequency of the output being determined by the SEL0 bit PDN0 = 1, the EN0 bit ...
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DIV WORD MSB first data byte N These ten bits determine the value of the programmable divider (N). The range of divisor values is from 2 to 1025, and is equal to the programmed value ...
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... When the DS1077 EEPROM is being written to, it will not be able to perform additional responses. In this case, the slave DS1077 will send a not- acknowledge to any data transfer request made by the master. It will resume normal operation when the EEPROM operation is complete ...
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... Slave transmitter mode: The first byte is received and handled as in the slave receiver mode. However, in this mode, the direction bit will indicate that the transfer direction is reversed. Serial data is transmitted on SDA by the DS1077 while the serial clock is input on SCL. START and STOP conditions are recognized as the beginning and end of a serial transfer. ...
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... A control byte is the first byte received following the START condition from the master device. The control byte consists of a 4-bit control code; for the DS1077, this is set as 1011 binary for read and write operations. The next three bits of the control byte are the device select bits (A2, A1, A0) and can be written to the EEPROM ...
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... SERIAL COMMUNICATION WITH DS1077 Figure 3 Send a “Standalone” Command SCL SDA Start Address Byte Write MSB of a Two-Byte Register SCL SDA Start Address Byte DS1077 ACK Write to a Two-Byte Register SCL ...
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... SERIAL COMMUNICATION WITH DS1077 Figure 3 (continued) Read Single Byte Register or MSB from a Two-Byte Register SCL SDA Start Control Byte DS1077 ACK Read from a Two-Byte Register SCL SDA Start Control Byte ...
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... COMMAND SET Data and control information is read from and written to the DS1077 in the format shown in Figure 3. To write to the DS1077, the master will issue the slave address of the DS1077 and the R/ After receiving an acknowledge, the bus master provides a command protocol. After receiving this protocol, the DS1077 will issue an acknowledge, and then the master may send data to the DS1077 ...
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... 5.25V 15pF CC L (Both Outputs) (-40°C to +85°C) I Power-Down CCQ Mode -40°C to +85° MIN TYP MAX 4.75 5 5.25 2.4 0 2 0.7Vcc 0.3V -0.3V 0.8 -0.3V 0.3Vcc DS1077 = 5V ±5%) UNITS NOTES µA µ µA ...
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AC ELECTRICAL CHARACTERISTICS PARAMETER Output Frequency Tolerance Over Temperature Output Frequency Tolerance Over Voltage Combined Freq. Variation Output Frequency Min Output Frequency Max Power-Up Time Enable OUT1 from PDN Enable OUT0 from PDN OUT1 Hi-Z from PDN OUT0 Hi-Z from ...
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AC ELECTRICAL CHARACTERISTICS: 2-WIRE INTERFACE PARAMETER SYMBOL SCL Clock Frequency Bus Free Time Between a STOP and START Condition Hold Time (Repeated) START Condition LOW Period of SCL HIGH Period of SCL Set-Up Time for a Repeated START Data Hold ...
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... TIMING DIAGRAM SDA t BUF t t LOW R SCL t HD:STA t HD:DAT STOP START ORDERING INFORMATION DS1077 Example: DS1077Z-100 = 1000ns + 250ns = 1250ns before the SCL line is released HIGH SU:STA SU:DAT REPEATED START 133 = 133.333MHz 125 = 125.000MHz 120 = 120.000MHz 100 = 100.000MHz > ...
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... TYPICAL OPERATING CHARACTERISTICS (V = 5.0V +25°C, unless otherwise specified) CC 45.00 40.00 35.00 30.00 25.00 20.00 15.00 10.00 5.00 0.00 4 SUPPLY CURRENT vs. VOLTAGE DS1077-133 DS1077-100 DS1077-66 4.7 4.9 5.1 5.3 VOLTAGE (V) SUPPLY CURRENT vs. DIVISOR (N) DS1077-133 4.75V 5.0V 5.25V 200 400 600 800 DIVISOR ( 5.5 1000 ...
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... TYPICAL OPERATING CHARACTERISTICS (continued 5.0V +25°C, unless otherwise specified SUPPLY CURRENT vs. TEMPERATURE SUPPLY CURRENT vs. DIVISOR (N) DS1077-133 DS1077-100 DS1077-66 200 400 600 800 DIVISOR (N) DS1077-133 DS1077-100 DS1077- TEMPERAT URE ( 1000 60 70 ...
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... TYPICAL OPERATING CHARACTERISTICS (continued 5.0V +25°C, unless otherwise specified) CC 1.5 0.5 -0.5 -1 -1.5 -2 2.00 1.50 1.00 0.50 0.00 -0.50 -1.00 -1.50 -2.00 TEMPCO MUX=3040h DIV=0000h TEMPERAT URE (C) VOLTCO MUX=3040h DIV=0000h 4.75 4.85 4.95 5.05 VOLTAGE ( DS1077-133 DS1077-100 DS1077- DS1077-133 DS1077-100 DS1077-66 5.15 5.25 ...
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... TYPICAL OPERATING CHARACTERISTICS (continued 5.0V +25°C, unless otherwise specified 3.5 3 2.5 2 1.5 1 0.5 0 SHUTDOWN CURRENT vs. TEMPERATURE DS1077- EMPERAT URE ( ...