DS1020-50 DALLAS [Dallas Semiconductor], DS1020-50 Datasheet - Page 8

• Manufacturer Part Number: DS1020-50
• Description: Programmable 8-Bit Silicon Delay Line
• Manufacturer: DALLAS [Dallas Semiconductor]

TERMINOLOGY
Period: The time elapsed between the leading edge of the first pulse and the leading edge of the
following pulse.
t
1.5V point on the trailing edge, or the 1.5V point on the trailing edge and the 1.5V point on the leading
edge.
t
input pulse.
t
input pulse.
t
pulse and the 1.5V point on the leading edge of the corresponding output pulse.
t
pulse and the 1.5V point on the trailing edge of the output pulse.
TIMING DIAGRAM: NON-LATCHED PARALLEL MODE (S = 1, E = 1) Figure 6
TIMING DIAGRAM: LATCHED PARALLEL MODE (S=1) Figure 7
WI
RISE
FALL
PLH
PHL
(Pulse Width): The elapsed time on the pulse between the 1.5V point on the leading edge and the
(Time Delay, Rising): The elapsed time between the 1.5V point on the leading edge of the input
(Time Delay, Falling): The elapsed time between the 1.5V point on the trailing edge of the input
(Input Rise Time): The elapsed time between the 20% and the 80% point on the leading edge of the
(Input Fall Time): The elapsed time between the 80% and the 20% point on the trailing edge of the
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