edd51163dbh-ls Elpida Memory, Inc., edd51163dbh-ls Datasheet - Page 6

• Manufacturer Part Number: edd51163dbh-ls
• Description: 512m Bits Ddr Mobile Ram
• Manufacturer: Elpida Memory, Inc.

DC Characteristics 1 (TA = 25 C to +85 C, VDD and VDDQ = 1.7V to 1.95V, VSS and VSSQ = 0V)
Parameter
Operating current
(ACT-PRE)
Standby current in power-down IDD2P
Standby current in power-down
with clock stop
Standby current in
non power-down
Standby current in non power-
down with clock stop
Active standby current in
power-down
Active standby current in
power-down with clock stop
Active standby current in non
power-down
Active standby current in non
power-down with clock stop
Burst operating current
Auto-refresh current
Deep power-down
current
Preliminary Data Sheet E1433E21 (Ver. 2.1)
Symbol
IDD0
IDD2PS
IDD2N
IDD2NS
IDD3P
IDD3PS
IDD3N
IDD3NS
IDD4
IDD5
IDD8
Grade
-5BLS
-6ELS
-5BLS
-6ELS
-5BLS
-6ELS
max.
85
60
0.8
0.6
6.0
5.0
2.0
3.0
2.0
10
7.0
145
120
106
10
6
Unit
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
A
Test condition
One bank active-precharge,
CKE = H, /CS = H between valid commands,
tCK = tCK (min.), tRC = tRC (min.),
Address bus inputs are SWITCHING;
Data bus inputs are STABLE
All banks idle,
CKE = L, /CS = H, tCK = tCK (min.),
Address and control inputs are SWITCHING;
Data bus inputs are STABLE
All banks idle,
CKE = L, /CS = H, CK = L, /CK = H,
Address and control inputs are SWITCHING;
Data bus inputs are STABLE
All banks idle,
CKE = H, /CS = H, tCK = tCK (min.),
Address and control inputs are SWITCHING;
Data bus inputs are STABLE
All banks idle,
CKE = H, /CS = H, CK = L, /CK = H,
Address and control inputs are SWITCHING;
Data bus inputs are STABLE
One bank active,
CKE = L, /CS = H, tCK = tCK (min.),
Address and control inputs are SWITCHING;
Data bus inputs are STABLE
One bank active,
CKE = L, /CS = H, CK = L, /CK = H;
Address and control inputs are SWITCHING;
Data bus inputs are STABLE
One bank active,
CKE = H, /CS = H, tCK = tCK (min.),
Address and control inputs are SWITCHING;
Data bus inputs are STABLE
One bank active,
CKE = H, /CS = H, CK = L, /CK = H,
Address and control inputs are SWITCHING;
Data bus inputs are STABLE
One bank active,
Continuous burst reads or writes;
tCK = tCK (min.), CL = 3, BL = 4, IOUT = 0mA,
Address inputs are SWITCHING,
50% data change each burst transfer
CKE = H, tCK = tCK (min.), tRFC = tRFC (min.),
Address and control inputs are SWITCHING;
Data bus inputs are STABLE
Address and control inputs are STABLE;
Data bus inputs are STABLE
EDD51163DBH-LS
Notes