em65567 ELAN Microelectronics Corp, em65567 Datasheet - Page 31
em65567
Manufacturer Part Number
em65567
Description
Com/ Color Driver
Manufacturer
ELAN Microelectronics Corp
Datasheet
1.EM65567.pdf
(93 pages)
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(REF, SWAP)=(0,1) or (1,0)
7.12 Gradation LSB Control
In the gradation display mode, the EM65567 provides segment driver output for 8 gradation display using 3-bits and that for
4 gradation display using 2-bits. The segment driver output for the 4-gradation display uses 2-bits written to the
corresponding RAM area and 1-bit supplemented by the gradation LSB circuit, and then selects 4-gradation form
8-gradation.
In the gradation display mode, the segment driver output for the 4-gradation display result in a gradation level of 0 regardless
of the gradation LSB, when 2-bits of data on the display RAM are “00”. When 2-bits of data on the display RAM is “11”, a
gradation level of 7/7 is selected regardless of the bit information of the gradation LS8.The other gradation levels are selected
depending on 2-bits of data on the display RAM and the gradation LSB bits.
One bit of data is supplemented by setting the gradation LSB register (GLSB).
The Gradation LSB control bit applied to all 4-gradation segment drivers.
Gradation LSB = “0”: Selects 0 as the LSB information on the RAM for 4-gradation segment drivers.
Gradation LSB = “1”: Selects 1 as the LSB information on the RAM for 4-gradation segment drivers.
7.13Gradation Palette
The EM65567 has two gradation display modes, the gradation fixed display mode and the gradation variable display mode.
Select either of the two modes using the gradation display mode register.
PWM = “0”: Selects the variable display mode using 8 gradation selected from 32 gradation.
PWM = “1”: Selects the fixed display mode using specific 8 gradation.
To select the best gradation level suited to the LCD panel, use the gradation palette register among the 32-level gradation
palettes in the gradation variable display mode. The segment driver output is set up by the selected 8-levels of gradation
palettes.
The gradation palette register provides three registers for the SEGAi (0-95) group, SEGBi (0-95) group, and SEGCi (0-95)
* This specification is subject to be changed without notice.
display
RAM data
Gradation
control
M SB
D0
1
0
palette Cj
SEGAi
D1
1
0
Note : Internal X address : nH
LSB
D2
1
1
M SB
D3
0
0
palette Bj
SEGBi
D4
0
0
LSB
D5
: 2FH-nH
1
1
M SB
D6
palette Aj
0
1
SEGCi
(REF="0")
(REF="1")
D7
0
1
31
66 COM/ 96 SEG 256 Color STN LCD Driver
M SB
D8
1
0
SEGAi+1
palette Cj
D9
1
0
D10
LSB
1
1
D11
M SB
0
0
SEGBi+1
palette Bj
D12
0
0
D13
LSB
1
1
D14
M SB
SEGCi+1
palette Aj
0
1
2003/1/9 (V0.1)
D15
0
1
i=0, 2, 4 to 94
EM65567
Gradation palette
j=0 to 7
MPU write data X
address: nH
LSB circuit
Gradation
0
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