UPD43256B-A NEC [NEC], UPD43256B-A Datasheet - Page 14
UPD43256B-A
Manufacturer Part Number
UPD43256B-A
Description
256K-BIT CMOS STATIC RAM 32K-WORD BY 8-BIT
Manufacturer
NEC [NEC]
Datasheet
1.UPD43256B-A.pdf
(24 pages)
- Current page: 14 of 24
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Write Cycle Timing Chart 2 (CS Controlled)
14
Cautions 1. CS or WE should be fixed to high level during address transition.
Remark Write operation is done during the overlap time of a low level CS and a low level WE.
Address (Input)
WE (Input)
CS (Input)
I/O (Input)
2. When I/O pins are in the output state, do not apply to the I/O pins signals that are opposite
in phase with output signals.
High impedance
t
AS
t
t
AW
WP
t
WC
t
CW
t
DW
Data In
t
t
DH
WR
impedance
High
PD43256B
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