f75373 Feature Integration Technology Inc., f75373 Datasheet - Page 24
f75373
Manufacturer Part Number
f75373
Description
Fintek Hardware Monitor Ic Datasheet
Manufacturer
Feature Integration Technology Inc.
Datasheet
1.F75373.pdf
(49 pages)
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6.10
6.11
Power on default: 00h
Power on default: 00h
IRQ/SMI# ENABLE Register 2 Index 33h
Interrupt Status Register 2 Index 34h
Bit
Bit
7-2
7-2
4
3
2
1
0
1
0
1
0
Fintek
EN_TARF2_SMI
EN_TARF1_SMI
STS_TAR_FAN2
STS_TAR_FAN1
Reserved
Reserved
VCCEXC
VT1EXC
V3EXC
V2EXC
V1EXC
Name
Name
Attribute
Attribute
R/W
R/W
R/W
R/W
R/W
RO
R/W
R/W
R/W
R/W
A one indicates a high limit of VT1 has been exceeded. A zero
indicates VT1 is below the hysteresis limit.
A one indicates a high or low limit of VIN3 has been exceeded. A zero
indicates VIN3 is in the safe region.
A one indicates a high or low limit of VIN2 has been exceeded. . A
zero indicates VIN2 is in the safe region.
A one indicates a high or low limit of VIN1 has been exceeded. . A
zero indicates VIN1 is in the safe region.
A one indicates a high or low limit of VCC has been exceeded. . A
zero indicates VCC is in the safe region.
Target fan2 SMI enable bit. A zero disables the corresponding
interrupt status bit for SMI# interrupt
Target fan1 SMI enable bit. A zero disables the corresponding
interrupt status bit for SMI# interrupt
A one indicates fan2 reading count is over then fan2 expect count,
and the PWMOUT2 duty cycle is full more then the FAN FAULT
TIME. Write 1 to clear this bit, write 0 will be ignored.
A one indicates fan1 reading count is over then fan1 expect count,
and the PWMOUT1 duty cycle is full more then the FAN FAULT
TIME. Write 1 to clear this bit, write 0 will be ignored.
19
Feature Integration Technology Inc.
Description
Description
F75373
V0.25P
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