UPD16782P NEC [NEC], UPD16782P Datasheet - Page 8

• Manufacturer Part Number: UPD16782P
• Description: SOURCE DRIVER FOR 300/288-OUTPUT TFT-LCD(NAVIGATION, AUTOMOBILE LCD-TV)
• Manufacturer: NEC [NEC]

4. PIN FUNCTIONS
8
C1 to C3
S
STHR,
STHL
CLI1 to
CLI3
INH
RESET
MP/TH
MP/1.5
R,/L
Osel
RMON1,
RMON2
Dummy1 to
Dummy4
V
V
V
V
TEST
1
DD1
DD2
SS1
SS2
Symbol
to S
300
Video signal input
Video signal output
Cascade I/O
Shift clock input
Inhibit input
Reset input
Multiplexer circuit
select input (1)
Multiplexer circuit
select input (2)
Shift direction
select input
Selection of
Number of outputs
switching input
Monitor
Dummy
Logic power supply
Driver power
supply
Logic ground
Driver ground
Test
Pin Name
30 to 47
130 to 429
81 to 86,
48 to 53
69 to 77
66 to 68
63 to 65
54 to 56
57 to 59
60 to 62
87 to 89
2, 3, 116,
117
1, 118, 129,
430
23 to 29,
90 to 96
4 to 15,
104 to 115
16 to 22,
97 to 103
119 to 128,
431 to 440
78 to 80
Pad No.
Output
Input
Input
Input
Input
Input
Input
Input
Input
I/O
I/O
Data Sheet S15806EJ1V0DS
Selects number of outputs.
O
O
Output pins S
The signal which is with S
is output identically.
This pin can measure the connection resistance at the time of COG
mounting. RMON1 and RMON2 are each short inside IC.
It does not connect with other pins inside IC.
No dummy pins are connected with other pins inside IC.
Input R, G, and B video signals.
Video signal output pins. Output sampled and held video signals during
horizontal period.
Start pulse I/O pins of sample hold timing. STHR serves as an input pin
and STHL, as an output pin, in the case of right shift. In the case of left
shift, STHL serves as an input pin, and STHR, as an output pin.
A start pulse is read at the rising edge of CLI1. Sampling pulse SHPn is
generated at the rising edge of CLI1 through CLI3 during successive
sampling, and at the rising edge of CLI1 during simultaneous sampling
(for details, refer to the Timing charts in 5. FUNCTIONAL
DESCRIPTION).
Selects a multiplexer and one of the two sample and hold circuits at the
falling edge.
Resets the select counter of the multiplexer and the selector circuit of
the two sample and hold circuits when it goes high. After reset, the
multiplexer is turned OFF, so sure to input one pulse of the INH signal
before inputting the video signal. If the video signal is input without the
INH signal, sampling is not executed.
Four types of color filter arrays can be supported by combination of
MP/TH and MP/1.5.
R,/L = H: Right shift: STHR
R,/L = L: Left shift: STHL
3.0 to 5.5 V
5.0
Connect this pin to ground of system.
Connect this pin to ground of system.
Fix this pin to low level.
sel
sel
= L: 288 output mode
= H: 300 output mode
0.5 V
Vertical stripe array
Single-side delta array
Mosaic array
Double-side delta array
145
Mode
through S
157
156
S
to S
300
are invalid in 288 output mode.
Description
S
1
168
MP/TH
S
S
(R,/L = H) or S
H
H
1
L
L
300
STHR
STHL
MP/1.5
H
H
L
L
133
to S
PD16782
144
(R,/L = L)