em636165 Etron Technology Inc., em636165 Datasheet - Page 21

• Manufacturer Part Number: em636165
• Description: 1m X 16 Bit Synchronous Dram Sdram
• Manufacturer: Etron Technology Inc.

6. A.C. Test Conditions
LVTTL Interface
7. Transition times are measured between V
8. t
9. These parameters account for the number of clock cycle and depend on the operating frequency of the
10.If clock rising time is longer than 1 ns, ( t
11.Assumed input rise and fall time t
12. Power up Sequence
Etron Confidential
Transition Time (Rise and Fall) of Input Signals
slope (1 ns).
HZ
clock as follows:
the number of clock cycles = specified value of timing/Clock cycle time
(count fractions as a whole number)
If t
should be added to the parameter.
Output
Power up must be performed in the following sequence.
1) Power must be applied to V
2) Start clock and maintain stable condition for minimum 200 µs, then bring CKE= “H” and, it is
3) All banks must be precharged.
4) Mode Register Set command must be asserted to initialize the Mode register.
5) A minimum of 2 Auto-Refresh dummy cycles must be required to stabilize the internal circuitry of the
defines the time in which the outputs achieve the open circuit condition and are not at reference levels.
R
LVTTL D.C. Test Load (A)
or t
signals are held "NOP" state .
recommended that DQM is held "HIGH" (V
device.
Reference Level of Output Signals
Reference Level of Input Signals
F
is longer than 1 ns, transient time compensation should be considered, i.e., [(tr + tf)/2 - 1] ns
Input Signal Levels
30pF
Output Load
1.2kΩ
3.3V
870Ω
T
DD
( t
R
and V
& t
R
F
IH
/ 2 -0.5) ns should be added to the parameter.
) = 1 ns
DDQ
and V
Output
(simultaneously) when CKE= “L”, DQM= “H” and all input
DD
21
IL
levels) to ensure DQ output is in high impedance.
. Transition(rise and fall) of input signals are in a fixed
LVTTL A.C. Test Load (B)
Reference to the Under Output Load (B)
Z0=
50 Ω
1.4V / 1.4V
2.4V / 0.4V
1.4V
1ns
30pF
50 Ω
1.4V
Rev. 3.4
EM636165
Apr. 2008