ch7009b Chrontel, ch7009b Datasheet - Page 39

• Manufacturer Part Number: ch7009b
• Description: Ch7009 Dvi / Tv Output Device
• Manufacturer: Chrontel

CHRONTEL
Bits 7-6 of register DC controls the crystal oscillator. The default value is recommended.
Buffered Clock Output Register
Bits 2-0 of register BCO select the signal output at the BCO pin, according to Table 21 below:
Bit 3 of register BCO selects the polarity of the BCO output. A value of ‘1’ does not invert the signal at the output pad.
Bit 4 of register BCO enables the BCO output. When BCOEN is high, the BCO pin will output the selected signal. When
BCOEN is low, the BCO pin will be held in tri-state mode.
Bits 7-5 of register BCO select the K3 divider, according to Table 22 below.
201-0000-035 Rev 3.31, 11/4/2004
Table 20. Composite / Horizontal Sync Output
Table 21. BCO Output Signal
Table 22. K3 Selection
SYNCO[1:0]
00
01
10
11
BCO[2:0]
000
001
010
011
SHF[2:0]
000
001
010
011
100
101
110
111
DEFAULT
SYMBOL
TYPE
BIT
Buffered Clock Output
The 14MHz crystal
(for test use only)
VCO divided by K3
Field ID
K3
2.5
3.0
3.5
4.0
4.5
5.0
6.0
7.0
SHF2
R/W
7
0
SHF1
R/W
6
0
C/H Sync Output
No Output
VGA Horizontal Sync
TV Composite Sync
TV Horizontal Sync
SHF0
R/W
5
0
BCOEN
101
BCO[2:0]
100
110
111
R/W
4
0
BCOP
R/W
Buffered Clock Output
(for test use only)
(for test use only)
VGA Vertical Sync
TV Vertical Sync
3
0
BCO2
R/W
Symbol:
Address:
Bits:
2
0
BCO1
R/W
CH7009B
1
0
BCO
22h
8
BCO0
R/W
39
0
0