sh6620a SinoWealth Micro-Electronics Corp. Ltd, sh6620a Datasheet - Page 4

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sh6620a

Manufacturer Part Number
sh6620a
Description
Mask 4-bit Microcontroller
Manufacturer
SinoWealth Micro-Electronics Corp. Ltd
Datasheet
3. RAM
Built-in RAM consists of general-purpose data memory and a system register. Direct addressing in one instruction can
access data memory and the system register.
The following is the memory allocation map:
$000 ~ $01F: System register and I/O.
$020 ~ $05F: Data memory (64 X 4 bits).
The configuration of the system register is as follows:
* Please refer to SH6610C user’s manual for the System Register $00 ~ $12
$0B ~ $0D
$19 ~ $1B
$13 ~ $15
Address
$0A
$0E
$0F
$1C
$1D
$1E
$1F
$00
$01
$02
$03
$04
$05
$06
$07
$08
$09
$10
$11
$12
$16
$17
$18
PC3OUT
PA3OUT
PB3OUT
T0H.3
TBR.3
DPL.3
T0L.3
LPD3
INX.3
PC.3
WDT
PA.3
PB.3
Bit3
-
-
-
-
-
-
-
-
-
-
-
-
-
PC2OUT
PA2OUT
PB2OUT
DPM.2
IRQT0
DPH.2
TM0.2
LPD2
TBR.2
DPL.2
T0H.2
T0L.2
INX.2
PA.2
PB.2
PC.2
IET0
Bit2
-
-
-
-
-
-
-
-
-
PA1OUT
PB1OUT
PC1OUT
DPM.1
TM0.1
TBR.1
DPH.1
T0H.1
DPL.1
T0L.1
LPD1
INX.1
PC.1
PA.1
PB.1
T0S
Bit1
-
-
-
-
-
-
-
-
-
-
PA0OUT
PB0OUT
PC0OUT
DPM.0
DPH.0
TM0.0
T0H.0
TBR.0
DPL.0
T0L.0
LPD0
INX.0
IRQP
PC.0
PA.0
PB.0
T0E
Bit0
IEP
-
-
-
-
-
-
-
-
4
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
W
W
W
W
W
W
-
-
-
-
-
-
-
Interrupt enable flags
Interrupt request flags
Timer0 Mode register (Pre-scaler)
Reserved.
Timer0 load/counter register low digit
Timer0 load/counter register high digit
Reserved
LPD Enable Control (LPD3 ~ 0)
1010: LPD Enable (Default)
0101: LPD Disable
PORTA
PORTB
PORTC
Reserved.
Table Branch Register
Pseudo index register
Data pointer for INX low nibble
Data pointer for INX middle nibble
Data pointer for INX high nibble
Reserved.
Set PORTA to be output port
Set PORTB to be output port
Set PORTC to be output port
Reserved.
Bit0: T0 signal edge, Bit1: T0 signal source
Reserved
Bit3: WDT time-out bit (write one only)
Reserved
Remarks
SH6620A

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