RF5110GPCBA-410 RFMD [RF Micro Devices], RF5110GPCBA-410 Datasheet - Page 4

• Manufacturer Part Number: RF5110GPCBA-410
• Description: 3V GSM POWER AMPLIFIER
• Manufacturer: RFMD [RF Micro Devices]

2-4
Base
Pkg
Pin
10
11
12
13
14
15
16
RF5110G
1
2
3
4
5
6
7
8
9
Function
RF OUT
RF OUT
RF OUT
RF OUT
GND1
GND2
VCC1
VCC2
VCC2
APC2
APC1
RF IN
GND
VCC
2F0
NC
NC
Description
Power supply for the pre-amplifier stage and interstage matching. This
pin forms the shunt inductance needed for proper tuning of the inter-
stage match. Refer to the application schematic for proper configura-
tion. Note that position and value of the components are important.
Ground connection for the pre-amplifier stage. Keep traces physically
short and connect immediately to the ground plane for best perfor-
mance. It is important for stability that this pin has it’s own vias to the
groundplane, to minimize any common inductance.
RF Input. This is a 50Ω input, but the actual impedance depends on the
interstage matching network connected to pin 1. An external DC block-
ing capacitor is required if this port is connected to a DC path to ground
or a DC voltage.
Ground connection for the driver stage. To minimize the noise power at
the output, it is recommended to connect this pin with a trace of about
40mil to the ground plane. This will slightly reduce the small signal
gain, and lower the noise power. It is important for stability that this pin
have it’s own vias to the ground plane, minimizing common inductance.
Power supply for the driver stage and interstage matching. This pin
forms the shunt inductance needed for proper tuning of the interstage
match. Please refer to the application schematic for proper configura-
tion, and note that position and value of the components are important.
Same as pin 5.
Not connected.
Connection for the second harmonic trap. This pin is internally con-
nected to the RF OUT pins. The bonding wire together with an external
capacitor form a series resonator that should be tuned to the second
harmonic frequency in order to increase efficiency and reduce spurious
outputs.
RF Output and power supply for the output stage. Bias voltage for the
final stage is provided through this wide output pin. An external match-
ing network is required to provide the optimum load impedance.
Same as pin 9.
Same as pin 9.
Same as pin 9.
Not connected.
Power supply for the bias circuits.
Power Control for the output stage. See pin 16 for more details.
Power Control for the driver stage and pre-amplifier. When this pin is
"low," all circuits are shut off. A "low" is typically 0.5V or less at room
temperature. A shunt bypass capacitor is required. During normal oper-
ation this pin is the power control. Control range varies from about 1.0V
for -10dBm to 2.6V for +35dBm RF output power. The maximum power
that can be achieved depends on the actual output matching; see the
application information for more details. The maximum current into this
pin is 5mA when V
Ground connection for the output stage. This pad should be connected
to the ground plane by vias directly under the device. A short path is
required to obtain optimum performance, as well as to provide a good
thermal path to the PCB for maximum heat dissipation.
APC1
=2.6V, and 0mA when V
APC
=0V.
Interface Schematic
See pin 3.
See pin 1.
See pin 3.
Same as pin 9.
Same as pin 9.
Same as pin 9.
See pin 16.
RF IN
GND
From Bias
Stages
From Bias
Stages
APC
From Bias
Stages
VCC
GND
PCKG BAS
Rev A3 060814
RF OUT
GND2
VCC2
GND1
GND
VCC1
To RF
Stages