ymf795 Yamatake Corporation, ymf795 Datasheet - Page 20

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ymf795

Manufacturer Part Number
ymf795
Description
Apl-2 Automobile Sound Player-2
Manufacturer
Yamatake Corporation
Datasheet
The register is used to set the clock frequency that is input through the CLK_I pin when the setting is made in the
programmable mode. Be sure to complete the setting before its sound generation.
A clock with any frequency can be input during the reset period.
For details of the clock setting, see “Clock Frequency Setting” (page 24).
The values that can be set to CLKSET are “000000000b”, and “000110000b” to “111110010b.”
When other value is set, the operation is not guaranteed.
A value to set to CLKSET can be found by using the following formula.
For example, when the clock frequency is 3 MHz:
And, actual clock frequency to be set is as follows.
$39h Clock setting
Default: 0000h
Index
$39h
b15
CLKSET = Clock frequency [KHz] / 447.443 × 8
CLKSET = 3000 / 447.443 × 8 is about 54 = 000110110b
Clock frequency [kHz] = 54 × 447.443 / 8 = 3020.24[kHz] = 3.02024[MHz]
0
b14
0
b13
0
b12
0
CLKSET [8:0]
000000000b
000000001b
000101111b
000110000b
000110001b
111110001b
111110010b
111110011b
111111111b
b11
0
:
:
:
b10
0
b9
0
-20-
Clock frequency(MHz)
b8
27.797396375
27.853326750
(Preset mode)
2.684658000
2.740588375
Prohibition
Prohibition
Prohibition
Prohibition
b7
:
:
:
b6
b5
CLKSET
b4
b3
YMF795
b2
b1
b0

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