SMP402SC POWERINT [Power Integrations, Inc.], SMP402SC Datasheet - Page 3

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SMP402SC

Manufacturer Part Number
SMP402SC
Description
20-72 VDC Input Non-isolated DC Output
Manufacturer
POWERINT [Power Integrations, Inc.]
Datasheet

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Pin Functional Description
Pin 1:
V
switching regulator. This is the Source
connection of the P-Channel power
MOSFET pass transistor.
Pin 2:
V
shift circuit that drives the P-Channel
MOSFET. A capacitor should be placed
between V
is normally 10 V below V
Pin 3:
The power supply can be shut down by
pulling ENABLE low.
Pin 4:
D GND is the common return point for
the power and logic portions of the
circuit.
Pin 5:
A GND is the common return point.
R
this point.
Functional Description
High Voltage Regulator
The high-voltage regulator provides the
bias current required by the controller
and driver circuitry. The pre-regulator
consists of a high voltage MOSFET, a
gate bias current source, and an error
amplifier. The error amplifier regulates
V
the gate of the MOSFET.
In 5 V output applications, the control
circuitry may also be operated by
connecting the V
V rail of the converter to reduce power
dissipation. The internal 5 V regulator is
cut off automatically when the converter
output is in regulation. Only the supply
EXT
LS
S
IN
to approximately 5 V by controlling
is an internal supply for the level
is the high-voltage input to the
and C
LS
EXT
and V
are directly connected to
BIAS
IN
for bypassing. V
pin to the output 5
IN
.
LS
Pin 6:
The SENSE+ input monitors the polarity
and level of the input voltage through an
external resistor for ISDN emergency
standby sensing.
Pin 7:
The SENSE- input monitors the polarity
and level of the input voltage through an
external resistor for ISDN emergency
standby sensing.
Pin 8:
A 20.5 k
R
currents including oscillator charge and
discharge currents.
Pin 9:
The oscillator frequency can be
programmed by selecting the value of
the capacitor connected between C
and A GND.
Pin 10:
V
rail of the converter to reduce power
dissipation. The internal 5 V regulator is
cut off when the output is in regulation.
current for the level shift stage ( 50 A)
and the AC switching currents for the P-
Channel output device are drawn from
the V
unused, V
GND to disable the automatic switchover
during power-up.
V
the gate of the internal P-channel
MOSFET.
approximately 10 V below V
supply voltage for the controller and
driver circuitry.
capacitors connected to V
required for filtering and reducing noise.
EXT
BIAS
LS
is the level-shift supply for driving
and A GND sets the internal bias
can be connected to the output 5 V
IN
supply under this condition. If
BIAS
resistor connected between
The voltage at V
must be hardwired to A
External bypass
LS
IN
and V
. V
S
is the
LS
S
EXT
are
is
Pin 11:
EA OUT is the error amplifier output
pin for connection to the external
compensation network.
Pin 12:
EA IN is the error amplifier negative
input for connection to the feedback and
compensation networks.
Pin 13:
pin is brought out for external bypassing.
Pin 14:
The LEVEL output indicates when the
input voltage is in its normal operating
range.
Pin 15:
The POLARITY output is used to notify
a microprocessor of an emergency
standby condition for ISDN applications.
Pin 16:
OUT is the Drain connection of the P-
Channel pass transistor.
UV Lockout
During power-up, the undervoltage
lockout circuit keeps the P-channel
output transistor in the off state until the
internal V
the voltage sensed by the input monitor
circuit is within the normal operation
range (>12 V).
Band Gap Reference
V
generated by the temperature-
compensated bandgap reference and
buffer. This voltage is used for setting
thresholds for the error amplifier and
over temperature circuit.
V
REF
S
is the internal supply voltage. This
is the 1.3 V reference voltage
S
supply is in regulation and
SMP402
1/96
D
3

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