EL4093C Elantec Semiconductor, Inc. (acquired by Intersil), EL4093C Datasheet - Page 11

• Manufacturer Part Number: EL4093C
• Description: 300MHz Dc-restored Video Amplifier
• Manufacturer: Elantec Semiconductor, Inc. (acquired by Intersil)

Applications Information
Autozero Range
The autozero range is defined as the difference
between the input DC level and the reference
voltage to restore to The size of this range is a
function of the gain setting resistors used and the
S H output current swing For a gain of
optimum feedback resistor is 750
able S H output current is
To determine the autozero range for this case we
refer to Figure 3 below
Suppose that the input DC level is
that the reference voltage is 0V We know that in
feedback the following two conditions will exist
on the CFA first its output will be equal to 0V
(due to autozero) and second its V
is equal to the V
rent I
into each of them This current I
I
maximum that I
for V
I
and see that V
accommodate most video signals
a
a
RG
AZ
V
V
DC
DC
) must come from the S H output Since the
e
DC
RF
) So we have a potential difference of
across both R
g
using the following
5 5 mA
e
I
RG
DC
AZ
e
e
e
IN
can be is 5 5 mA we can solve
Figure 3
2
F
g
V
a
and R
DC
750
V
2V This range can easily
DC
voltage (i e V
750
g
G
5 5 mA minimum
resulting in a cur-
that must flow
AZ
and the avail-
IN
a
e
b
V
Contd
300 MHz DC-Restored Video Amplifier
IN
DC
(I
a
voltage
RF
b e
4093 – 39
2 the
and
a
11
As another example consider the case where we
are restoring to a reference voltage of
Using the same reasoning as above a current I
and a current I
Again our boundary condition is that I
V
Hence V
This example illustrates that when the reference
changes the autozero range also changes In gen-
eral the user should determine the autozero
range for his her application and ensure that the
input signal is within this range during the au-
tozero period
Autozero Loop Bandwidth
The gain-bandwidth product (GBWP) of the au-
tozero loop is determined by the size of the hold
capacitor the value of R
ances (gm’s) of the S H amplifier To begin the
S H amplifier is modeled as in Figure 4 below
First the input stage transconductance is repre-
sented by gm1 with the compensation capacitor
given by C
gm1 (2
output its output stage can be modeled as a
transconductance gm2 in this case having a val-
ue of 1 (500 ) The current from gm2 then flows
through the I to V converter made up of the CFA
and R
GBWP of the overall loop is given by
GBWP
e
s g
g
e
DC
5 5 mA
207 kHz Next since the S H has a current
(V
5 5 mA and we can solve for the allowable
values using the following
DC
F
e
DC
to produce a voltage gain Thus the
b
e
2
HOLD
C
must be between
0 75V) R
V
HOLD
DC
gm1
RG
C
750
HOLD
b
e
)
This stage’s GBWP is thus
0 75V
e
V
F
DC
1 (2
(gm2
F
must flow through R
EL4093C
and the transconduct-
a
R
G
750
V
a
must go into R
DC
R
(350 )(2 2 nF))
2 4V to
F
)
RF
a
b
a
0 75V
1 7V
I
RG
RF
G
F