SI4112 ETC, SI4112 Datasheet - Page 20
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SI4112
Manufacturer Part Number
SI4112
Description
Dual-band RF Synthesizer WITH Integrated VCOS FOR Wireless Communications
Manufacturer
ETC
Datasheet
1.SI4112.pdf
(34 pages)
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S i4 13 3
Auxiliary Output (AUXOUT)
The signal appearing on AUXOUT is selected by setting
the AUXSEL bits in the Main Configuration register
(Register 0).
20
450
400
350
300
250
200
150
100
50
0
Figure 18. Typical IF Output Voltage vs. Load Resistance at 550 MHz
0
PWDNB Pin
PWDNB = 0
PWDNB = 1
LPWR=0
200
AUTOPDB
Table 11. Power Down Configuration
X
0
0
0
0
1
400
PDIB
X
0
0
1
1
x
Load Resistance ( )
Rev. 1.1
LPWR=1
600
The LDETB signal can be selected by setting the AUXSEL
bits to 11. This signal can be used to indicate that the IF or
RF PLL is about to lose lock due to excessive ambient
temperature drift and should be re-tuned.
PDRB
X
0
1
0
1
x
IF Circuitry
800
OFF
OFF
OFF
ON
ON
ON
1000
Circuitry
OFF
OFF
OFF
ON
ON
ON
RF
1200