ina-52063 Avago Technologies, ina-52063 Datasheet - Page 4

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ina-52063

Manufacturer Part Number
ina-52063
Description
1.5 Ghz Low Noise Silicon Mmic Amplifier - Agilent Hewlett-packard
Manufacturer
Avago Technologies
Datasheet

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INA-52063 Typical Scattering Parameters
Note: 3. Reference plane per Figure 9 in Applications Information section.
INA-52063 Applications
Information
Introduction
The INA-52063 is a silicon RFIC
amplifier that is designed with an
internal resistive feedback net-
work to provide a 50
50
Third Order Intercept Point of
+20 dBm and a low Noise Figure
of 4 dB, the INA-52063 is
especially useful for RF and IF
amplifier applications requiring
high dynamic ranges.
Phase Reference Planes
The positions of the reference
planes used to measure
S-Parameters for this device are
shown in Figure 9. As seen in the
illustration, the reference planes
are located at the point where the
package leads contact the test
circuit.
Freq.
GHz
0.05
0.10
0.20
0.30
0.40
0.50
0.60
0.70
0.80
0.90
1.00
1.20
1.40
1.60
1.80
2.00
2.20
2.40
2.60
2.80
3.00
output impedance. With a
Mag
0.06
0.06
0.06
0.07
0.07
0.09
0.10
0.12
0.13
0.15
0.17
0.21
0.24
0.27
0.30
0.32
0.33
0.35
0.36
0.36
0.36
S
11
Ang
-105
-117
-128
-139
-149
165
154
131
104
-12
-33
-50
-66
-80
-93
80
66
46
30
14
0
input and
23.5
23.4
23.4
23.3
23.1
23.0
22.8
22.6
22.3
22.0
21.7
21.0
20.2
19.4
18.6
17.8
17.1
16.3
15.5
14.8
14.1
dB
SOT-363 PCB Layout
The INA-52063 is packaged in the
miniature SOT-363 (SC-70)
surface mount package. A PCB
pad layout for the SOT-363
package is shown in Figure 10
(dimensions are in inches). This
layout provides ample allowance
for package placement by
automated assembly equipment
without adding pad parasitics that
Figure 9. Phase Reference Planes.
14.88
14.84
14.72
14.57
14.33
14.08
13.76
13.41
13.01
12.59
12.14
11.22
10.28
Mag
7.13
6.52
5.98
5.52
5.08
9.38
8.55
7.80
S
21
TEST CIRCUIT
REFERENCE
Ang
-106
-122
-137
-151
-164
-177
170
159
147
136
PLANES
-19
-28
-37
-46
-55
-64
-73
-82
-90
-5
-9
6-159
[3]
,
-29.3
-29.3
-29.4
-29.5
-29.4
-29.4
-29.4
-29.3
-29.2
-29.0
-28.8
-28.4
-28.1
-27.7
-27.5
-27.4
-27.6
-27.8
-28.1
-28.9
-29.5
dB
T
C
= 25 C, Z
0.034
0.034
0.034
0.034
0.034
0.034
0.034
0.034
0.035
0.036
0.036
0.038
0.040
0.041
0.042
0.043
0.042
0.041
0.039
0.036
0.033
Mag
S
12
O
= 50 , V
could impair the high frequency
performance of the INA-52063.
The layout is shown with a
nominal SOT-363 package
footprint superimposed on the
PCB pads for reference.
Figure 10. PCB Pad Layout
(dimensions in inches).
Ang
-12
-15
-16
-1
-5
-8
0
0
0
1
2
3
4
5
6
6
7
7
6
4
2
0.035
CC
0.026
= 5.0 V
Mag
0.05
0.05
0.05
0.06
0.07
0.08
0.09
0.11
0.13
0.14
0.16
0.20
0.23
0.25
0.27
0.29
0.30
0.31
0.32
0.33
0.33
S
22
0.016
Ang
-107
-118
-129
-139
-149
-158
-168
-10
-14
-21
-29
-37
-45
-52
-67
-81
-94
-1
-5
1
0
0.07
Factor
1.24
1.24
1.25
1.25
1.26
1.27
1.28
1.29
1.28
1.27
1.28
1.25
1.24
1.26
1.29
1.33
1.44
1.56
1.74
2.01
2.37
K

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