SFTB NSC [National Semiconductor], SFTB Datasheet - Page 9

• Manufacturer Part Number: SFTB
• Description: Thin SOT23 1A Load Step-Down DC-DC Regulator
• Manufacturer: NSC [National Semiconductor]

Design Guide
OUTPUT VOLTAGE
The output voltage is set using the following equation where
R2 is connected between the FB pin and GND, and R1 is
connected between V
is 10kΩ.
PCB Layout Considerations
When planning layout there are a few things to consider
when trying to achieve a clean, regulated output. The most
important consideration when completing the layout is the
close coupling of the GND connections of the C
and the catch diode D1. These ground ends should be close
to one another and be connected to the GND plane with at
least two through-holes. Place these components as close to
the IC as possible. Next in importance is the location of the
GND connection of the C
near the GND connections of C
There should be a continuous ground plane on the bottom
layer of a two-layer board except under the switching node
island.
The FB pin is a high impedance node and care should be
taken to make the FB trace short to avoid noise pickup and
inaccurate regulation. The feedback resistors should be
placed as close as possible to the IC, with the GND of R2
placed as close as possible to the GND of the IC. The V
trace to R1 should be routed away from the inductor and any
other traces that are switching.
High AC currents flow through the V
so they should be as short and wide as possible. However,
making the traces wide increases radiated noise, so the
designer must make this trade-off. Radiated noise can be
decreased by choosing a shielded inductor.
The remaining components should also be placed as close
as possible to the IC. Please see Application Note AN-1229
for further considerations and the LM2734Z demo board as
an example of a four-layer layout.
Calculating Efficiency, and
Junction Temperature:
The complete LM2734Z DC/DC converter efficiency can be
calculated in the following manner.
Or
Calculations for determining the most significant power
losses are shown below. Other losses totaling less than 2%
are not discussed.
O
and the FB pin. A good value for R2
(Continued)
OUT
capacitor, which should be
IN
and D1.
IN
, SW and V
IN
OUT
capacitor
traces,
OUT
9
Power loss (P
the converter, switching and conduction. Conduction losses
usually dominate at higher output loads, where as switching
losses remain relatively fixed and dominate at lower output
loads. The first step in determining the losses is to calculate
the duty cycle (D).
V
on, and is equal to:
V
can be obtained from the Electrical Characteristics section. If
the voltage drop across the inductor (V
the equation becomes:
This usually gives only a minor duty cycle change, and has
been omitted in the examples for simplicity.
The conduction losses in the free-wheeling Schottky diode
are calculated as follows:
Often this is the single most significant power loss in the
circuit. Care should be taken to choose a Schottky diode that
has a low forward voltage drop.
Another significant external power loss is the conduction
loss in the output inductor. The equation can be simplified to:
The LM2734Z conduction loss is mainly associated with the
internal NFET:
Switching losses are also associated with the internal NFET.
They occur during the switch on and off transition periods,
where voltages and currents overlap resulting in power loss.
The simplest means to determine this loss is to empirically
measuring the rise and fall times (10% to 90%) of the switch
at the switch node:
Another loss is the power required for operation of the inter-
nal circuitry:
I
1.5mA. The other operating power that needs to be calcu-
lated is that required to drive the internal NFET:
Q
SW
D
is the quiescent operating current, and is typically around
is the forward voltage drop across the Schottky diode. It
is the voltage drop across the internal NFET when it is
Typical Rise and Fall Times vs Input Voltage
P
P
SWR
SWF
LOSS
10V
15V
V
5V
P
IN
P
COND
= 1/2(V
= 1/2(V
P
BOOST
) is the sum of two basic types of losses in
DIODE
V
P
P
SW
SW
IND
= I
P
= P
= I
Q
= I
= I
IN
IN
= V
OUT
= I
OUT
x I
x I
T
BOOST
OUT
10ns
SWF
8ns
9ns
RISE
D
Q
2
OUT
OUT
x I
2
x R
x V
x R
+ P
x R
OUT
x freq x T
x freq x T
x V
DSON
IN
DSON
SWR
DCR
(1-D)
BOOST
DCR
x D
T
4ns
6ns
7ns
) is accounted for,
FALL
FALL
RISE
)
)
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