zl10036 Zarlink Semiconductor, zl10036 Datasheet - Page 13

• Manufacturer Part Number: zl10036
• Description: Digital Satellite Tuner With Rf Bypass
• Manufacturer: Zarlink Semiconductor

The baseband post-filter gain stage can be used to provide additional gain to maintain desired output amplitude
with lower symbol rate applications.
2.2.1
The RF input amplifier feeds an AGC stage, which provides for RF gain control.
The RF AGC is divided into two stages. The first stage is a continually variable gain control stage, which is
controlled by the AGC sender and provides the main system AGC set under control of the analogue AGC signal
generated by the demodulator section. The second stage is a bus programmable, two position gain set previous to
the quadrature mixer and provides for 4 dB of gain adjust under software control.
The analogue RF AGC is optimized for S/N and S/I performance across the full dynamic range. The RF AGC
characteristic, variation of IIP2, IIP3 and NF are contained in Figure 6, Figure 7 & Figure 8 respectively.
The RF preamplifier is also coupled to the selectable RF bypass, which is described in “RF bypass” on page 16.
The specified electrical parameters of the RF input are unaffected by the RF bypass state.
Normalized gain
range in dB:
Gain function:
Control
function:
RF
-10
-20
-30
-40
-50
-60
-70
-80
10
0
0 - 72
RF AGC
Analogue
voltage
0
0.5
Figure 5 - Typical First Stage RF AGC Response
0 or +4
Stepped
I²C bus
1
Figure 4 - AGC Control Structure
1.5
Zarlink Semiconductor Inc.
AGC control voltage V
ZL10036
2
0 to 12.6 in 4.2 dB steps
Stepped
I²C bus
13
2.5
3
3.5
4
4.5
0 to 12.6 in 4.2 dB steps
Stepped
I²C bus
5
Data Sheet