alc850 Realtek Semiconductor Corporation, alc850 Datasheet - Page 30

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alc850

Manufacturer Part Number
alc850
Description
Eight Channel Ac?97 2.3 Audio Codec
Manufacturer
Realtek Semiconductor Corporation
Datasheet

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To ensure that control and status information is sent at the beginning of S/PDIF transmission (starting at
bit31), MX3A.[14:0] should only be written to when the S/PDIF transmitter is disabled (MX2A.2=0). If
validity control is set (MX3A.15=1), the data bits (bit8 ~ bit27) should be forced to 0 to get better
compatibility with mini discs.
The ‘V’ bit in the sub-frame is determined by Validity control (MX3A.15) and VCFG (MX2A.15):
Eight Channel AC’97 2.3 Audio Codec
PRO=0
Validity
CC0
Fs0
16
24
0
0
8
0
0
1
1
/AUDI
CC1
Fs1
17
25
O
VCFG
0
1
9
0
1
0
1
COPY
Table 30. S/PDIF Channel Status
Table 31. S/PDIF Validity Control
CC2
Fs2
10
18
26
Operation
If S/PDIF FIFO is under-run, the ‘V’ bit in the sub-frame
is set to indicate that the S/PDIF data is invalid
If S/PDIF FIFO is under-run, the ‘V’ bit in the sub-frame
is always 0, and pads the data with zeros
The ‘V’ bit is always 1, and data bits (bit 8 ~ bit 27)
should be forced to 0
The ‘V’ bit in the sub-frame is always ‘0’, and the S/PDIF
output data should be forced to 0
0
2
PRE
CC3
Fs3
11
19
27
0
3
22
CC4
12
20
28
0
0
0
4
CC5
13
21
29
0
0
0
5
CC6
14
22
30
0
0
0
6
Track ID: JATR-1076-21 Rev. 1.4
LEVEL
15
23
31
0
0
0
7
Datasheet
ALC850

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