alc885-gr Realtek Semiconductor Corporation, alc885-gr Datasheet - Page 28
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alc885-gr
Manufacturer Part Number
alc885-gr
Description
7.1+2 Channel High-performance Hda Codec With Content Protection
Manufacturer
Realtek Semiconductor Corporation
Datasheet
1.ALC885-GR.pdf
(98 pages)
- Current page: 28 of 98
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7.3.3.
7.1+2 Channel High-Performance HDA Codec
With Content Protection
SYNC
BCLK
RST#
Exit from Reset
SDIx
The codec drives SDI high at the last bit of SYNC to request a Codec Address (CAD) from the
The codec will stop driving the SDI during this turnaround period
The controller releases the SDI after the CAD has been assigned
Normal operation state
controller
The controller drives SDI to assign a CAD to the codec
Codec Initialization Sequence
Connection Frame
Frame SYNC
Drives SDIx
Codec
1
Turnaround
(477 BCLK
2
Codec
Max.)
Figure 14. Codec Initialization Sequence
Turnaround Frame
(Non-48kHz Frame)
3
Frame SYNC
Controller Drives SDIx
20
SD0 SD1
4
5
(Non-48kHz Frame)
SD14
Address Frame
6
Turnaround
(477 BCLK
Controller
Max.)
7
8
Frame SYNC
Codec Drives SDIx
ALC885 Series
Normal Operation
Datasheet
Response
Rev. 1.1
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