SC91650A SILAN [Silan Microelectronics Joint-stock], SC91650A Datasheet - Page 10

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SC91650A

Manufacturer Part Number
SC91650A
Description
13 MEMORY TONE / PULSE DIALER WITH REDIAL SAVE HANDFREE & HOLD FUNCTION
Manufacturer
SILAN [Silan Microelectronics Joint-stock]
Datasheet
(continued)
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1
HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD
Silan
Semiconductors
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1
12
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1
PMUTE
HDO
HFO
HFI
HDI
HFI
KT
*Handfree input control pin. (SC91650, SC91651)
*Toggle input structure, rising edge trigger.
*It is used to enable and disable Handfree funtion.
*With waveshaped by a built-in Schmit trigger, the bounce of input
can be eliminated by external R C debounce circuit.
* A built-in pull down resistor is 200k
* Toggle input structure with pull up resistance 200k , falling edge
trigger. (SC91652)
* Handfree output pin.
* Inverter output structure (normally ‘low’, active ‘high’).
* When a HFI pin is active, Handfree function will be enabled
(HFO=1) or disable (HFO=0).
* When the Handfree function is enable (HFO=1), after OFF-HOOK
action, it can reset Handfree function and HFO pin return to ‘low’
state.
*Hold line input control pin.
*Toggle input structure, falling edge trigger.
*It is used to enable and disable Hold line function.
*With waveshaped by a built-in Schmit trigger, the bounce of input
can be eliminated by extenal R.C debounce circuit.
*A built-in pull up resistor is 200k
*Hold line output pin.
*Inverter output structure, falling edge trigger.
*When a falling edge signal triggered HDI pin, Hold line function will
be enable (HDO=1) or disabled(HDO=0).
*When the Hold line function is enable (HDO=1), after OFF-HOOK
action or HFO pin is from “low” to “high”, it can reset Hold line
function and HDO pin return to “low” state.
*Keytone output pin for ralid key pad input and memory stored
(SC91652 only).
*CMOS invertor output structure.
*It will issue a 1.2kHz, duty cycle 50% signal with duration 30ms.
*To prevent signal interference, while DTMF issue, it will disable
Keytone output except function key.
*Pulse mode mute.
*CMOS inverter output structure.
*The output is high state during dialing sequence (pulse mode only),
otherwise this pin is low.
10
typically.
typical.
REV: 1.0
2001.01.15

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