mx25l512c Macronix International Co., mx25l512c Datasheet - Page 6

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mx25l512c

Manufacturer Part Number
mx25l512c
Description
512k-bit [x 1] Cmos Serial Flash
Manufacturer
Macronix International Co.
Datasheet

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The Serial Data Output (SO) is high impedance, both Serial Data Input (SI) and Serial Clock (SCLK) are don't care
during the HOLD operation. If Chip Select (CS#) drives high during HOLD operation, it will reset the internal logic of
the device. To re-start communication with chip, the HOLD# must be at high and CS# must be at low.
Figure 1. Hold Condition Operation
P/N: PM1469
Table 1. Protected Area Sizes
HOLD FEATURE
HOLD# pin signal goes low to hold any serial communications with the device. The HOLD feature will not stop the
operation of write status register, programming, or erasing in progress.
The operation of HOLD requires Chip Select(CS#) keeping low and starts on falling edge of HOLD# pin signal
while Serial Clock (SCLK) signal is being low (if Serial Clock signal is not being low, HOLD operation will not start
until Serial Clock signal being low). The HOLD condition ends on the rising edge of HOLD# pin signal while Se-
rial Clock(SCLK) signal is being low( if Serial Clock signal is not being low, HOLD operation will not end until Serial
Clock being low), see Figure 1.
BP1
CS#
HOLD#
0
0
1
1
SCLK
Status bit
BP0
0
1
0
1
(standard)
Condition
Hold
6
Protect level
0 (none)
1 (All)
2 (All)
3 (All)
(non-standard)
Condition
MX25L512C
Hold
None
REV. 1.0, APR. 14, 2009
512b
All
All
All

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