mx25l3225d Macronix International Co., mx25l3225d Datasheet - Page 15

• Manufacturer Part Number: mx25l3225d
• Description: Serial Flash Memory
• Manufacturer: Macronix International Co.

Note 1:
Note 2:
Note 3:
P/N: PM1432
Table 5. Command Set
COMMAND DESCRIPTION
COMM AND
(byte)
1st byte
2nd byte
3rd byte
4th byte
Action
COMMAND
(byte)
1st byte
2nd byte
3rd byte
4th byte
Action
CO M M A ND
(by te)
1s t by te
2nd by te
3rd by te
4th by te
5th by te
A c tion
The count base is 4-bit for ADD(2) and Dummy(2) because of 2 x I/O, and the MSB is on SI/SIO1, which is different from 1 x I/O condition.
ADD=00H will output the manufacturer ID first and ADD=01H will output device ID first.
It is not recommended to adopt any other code not in the command definition table, which will potentially enter the hidden mode.
38 (hex)
AD1
quad input
4PP (quad
page
program)
to program
the selected
page
RE MS (read
electronic
manufacturer
& device ID)
90 (hex)
x
x
ADD (Note 2) A DD (Note 2) A DD (Note 2)
output the
manufacturer
ID & device
ID
W RE N
(write
enable)
06 (hex )
s ets the
(W E L)
write
enable
latc h bit
W RDI
(write
dis able)
04 (hex )
res ets the
(W E L)
write
enable
latc h bit
SE
(sector
erase)
20 (hex) D8 (hex) 60 or C7
AD1
AD2
AD3
to erase
the
selected
sector
RE MS 2
(read ID for
2x I/O mode)
E F (hex)
x
x
output the
m anufacturer
ID & device
ID
BE
(block
erase)
AD1
AD2
AD3
to erase
the
selected
block
RDID (read
identific ation)
9F (hex )
outputs
JE DE C ID: 1-
by te
m anufac turer
ID & 2-by te
devic e ID
RE MS 4
(read ID for
4x I/O mode)
DF (hex)
x
x
output the
m anufacturer
ID & device
ID
CE (chip
erase)
(hex)
to erase
whole
chip
RDS R (read
s tatus
regis ter)
05 (hex )
to read out
the values
of the
s tatus
regis ter
PP (Page
program)
02 (hex)
AD1
AD2
AD3
to
program
the
selected
page
E NSO
(enter
secured
OTP)
B 1 (hex)
to enter
the 4K -bit
secured
OTP
m ode
15
W RS R
(write s tatus
regis ter)
01 (hex )
V alues
to write new
values to the
s tatus
regis ter
CP
(Continuou
sly
program
mode)
AD (hex)
AD1
AD2
AD3
continously
program
whole chip,
the
address is
automatical
ly increase
EXS O (exit
secured
OTP )
C1 (hex)
to exit the
4K-bit
secured
OTP m ode
RE A D (read
data)
03 (hex )
A D1(A 23-
A 16)
A D2 (A 15-
A 8)
A D3 (A 7-
A 0)
n by tes
read out
until CS #
goes high
DP (Deep
power
down)
B9 (hex)
enters
deep power
down mode
RDSCUR
(read
security
register)
2B (hex)
to read
value of
security
register
MX25L3225D
RDP
(Release
from deep
power
down)
AB (hex)
release
from deep
power
down mode
FA S T
RE A D (fas t
read data)
0B (hex )
A D1
A D2
A D3
Dum m y
n by tes
read out
until CS #
goes high
W RS CUR
(write
security
register)
2F (hex)
to set the
lock-down
bit as "1"
(once
lock-down,
cannot be
updated)
RES (read
electronic
ID)
AB (hex)
x
x
x
to read
out 1-byte
device ID
2RE A D (2
x I/O read
c om m and)
Note1
B B (hex )
A DD(2)
A DD(2) &
Dum m y (2)
n by tes
read out by
2 x I/O until
CS # goes
high
E S RY
(enable
S O to
output
RY /B Y#)
70 (hex)
to enable
S O to
output
RY /B Y#
during CP
m ode
REV. 0.00, SEP. 19, 2008
Read
Enhanced
FF (hex)
x
x
x
All these
commands
FFh,00h,AAh
or 55h will
escape the
performance
enhance
mode.
DS RY
(disable
S O to
output
RY /B Y#)
80 (hex)
to disable
S O to
output
RY /B Y#
during CP
m ode
4RE A D (4
x I/O read
c om m and)
E B (hex )
A DD(4) &
Dum m y (4)
Dum m y (4)
n by tes
read out by
4 x I/O until
CS # goes
high