hd66765 Renesas Electronics Corporation., hd66765 Datasheet - Page 33

• Manufacturer Part Number: hd66765
• Description: 396-channel Segment Driver With Internal Ram For 4096-color Displays - Hitachi Semiconductor
• Manufacturer: Renesas Electronics Corporation.

Table 17 Instruction List
R00h
R01h
R02h
R03h
R04h
R05h
R06h
R07h
R0Ah
R0Bh
R0Ch
R11h
R14h
R15h
R16h
R17h
R20h
R21h
R22h
R30h
R31h
R32h
R33h
R34h
R35h
R36h
R37h
Reg.
No.
SR
IR
Register Name
Index
Status read
Start oscillation
Device code read
Driver output control
LCD-driving-waveform
control
Power control 1
Contrast control
Entry mode
Compare register
Display control
COM driver interface control
Frame cycle control
Power control 2
Vertical scroll control
1st screen driving position
2nd screen driving position
Horizontal RAM address position
Vertical RAM address position
RAM write data mask
RAM address set
Write data to GRAM
Write data from GRAM
Grayscale palette control (1)
Grayscale palette control (2)
Grayscale palette control (3)
Grayscale palette control (4)
Grayscale palette control (5)
Grayscale palette control (6)
Grayscale palette control (7)
Grayscale palette control (8)
Note: 1. '*' means 'doesn't matter'.
2. After setting TE = 1, 18 (max.) clock cycles are required for a serial transfer to be completed. During that time, do not change the bits of instructions which are to be transferred.
3. High-speed write mode is available only for the RAM writing.
R/W
0
1
0
1
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
RS
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
DB15 DB14 DB13 DB12 DB11 DB10
SE17
SE27
HEA7 HEA6 HEA5 HEA4 HEA3 HEA2 HEA1 HEA0 HSA7 HSA6 HSA5 HSA4 HSA3 HSA2 HSA1 HSA0 Sets the start (HSA7-0) and end (HEA7-0) of the horizontal RAM address range.
VEA7 VEA6 VEA5 VEA4 VEA3 VEA2 VEA1 VEA0 VSA7 VSA6 VSA5 VSA4 VSA3 VSA2 VSA1 VSA0 Sets the start (VSA7-0) and end (VEA7-0) of the vertical RAM address range.
VL27
L7
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
*
*
SE16
SE26
VL26
BS2
L6
*
*
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SE15
SE25
VL25
BS1
Write Data (upper)
Read Data (upper)
L5
*
*
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Upper Code
PK114 PK113 PK112 PK111 PK110
PK134 PK133 PK132 PK131 PK130
PK154 PK153 PK152 PK151 PK150
VL24
SE14
SE24
PK14
PK34
PK54
PK74
PK94
BS0
L4
*
*
0
0
0
0
0
0
0
0
0
0
0
0
AD15-8 (upper)
VL23
SE13
SE23
PK13
PK33
PK53
PK73
PK93
BT3
VR3
WM
L3
11
*
*
0
0
0
0
0
0
0
0
0
0
VLE2
VL22
SE12
SE22
PK12
PK32
PK52
PK72
PK92
VR2
BT2
WM
L2
10
*
*
1
0
0
0
0
0
0
0
0
HWM
CMS
VLE1
DIV1
VL21
SE11
SE21
WM9
PK11
PK31
PK51
PK71
PK91
DB9
VR1
B/C
BT1
L1
*
*
1
0
0
0
0
DIV0
VL20
SE10
SE20
WM8
PK10
PK30
PK50
PK70
PK90
DB8
SGS
EOR
VR0
SPT
BT0
L0
TE
TE
*
*
1
0
0
0
VL17
SS17
SS27
WM7
DB7
CP7
*
0
*
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VL16
SS16
SS26
WM6
DB6
DC2
CT6
CP6
ID6
C6
*
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
HITACHI
VL15
SS15
SS25
WM5
DB5
NW5
DC1
CT5
I/D1
CP5
ID5
C5
Write Data (lower)
Read Data (lower)
33
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
*
Lower Code
PK104 PK103 PK102 PK101 PK100 Specifies the Grayscale palette.
PK124 PK123 PK122 PK121 PK120 Specifies the Grayscale palette.
PK144 PK143 PK142 PK141 PK140 Specifies the Grayscale palette.
VL14
SS14
SS24
WM4
PK04
PK24
PK44
PK64
PK84
DB4
NW4
DC0
NL4
CT4
I/D0
CP4
ID4
C4
0
0
0
0
0
0
*
AD7-0 (lower)
RTN3 RTN2 RTN1 RTN0 Sets the line retrace period (RTN3-0) and operating clock frequency-division ratio (DIV1-0)
VL13
SS13
SS23
WM3
PK03
PK23
PK43
PK63
PK83
DB3
NW3
CP3
NL3
AP1
CT3
ID3
AM
C3
*
0
0
0
0
0
NW2
IDX2
IDX2
VL12
SS12
SS22
WM2
PK02
PK22
PK42
PK62
PK82
DB2
CP2
REV
VC2
ID2
NL2
AP0
CT2
LG2
C2
*
0
NW1
IDX1
IDX1
VL11
SS11
SS21
WM1
PK01
PK21
PK41
PK61
PK81
DB1
CP1
VC1
NL1
SLP
CT1
LG1
ID1
C1
D1
*
1
NW0
IDX0
IDX0
VL10
SS10 Sets 1st-screen driving start (SS17-10) and end (SE17-10).
SS20 Sets 2nd-screen driving start (SS27-20) and end (SE27-20).
WM0
PK00 Specifies the Grayscale palette.
PK20 Specifies the Grayscale palette.
PK40 Specifies the Grayscale palette.
PK60 Specifies the Grayscale palette.
PK80 Specifies the Grayscale palette.
DB0
STB
CP0
VC0
NL0
CT0
LG0
ID0
C0
D0
1
1
Sets the index register value.
Reads the driving raster-row position (L7-0) and contrast setting (C6-0).
Starts the oscillation mode.
Reads 0765H.
Sets the common driver shift direction (CMS), segment driver shift
direction (SGS), and driving duty ratio (NL4-0).
Sets the LCD drive AC waveform (B/C), EOR output (EOR), and the
number of n-raster-rows (NW5-0) at C-pattern AC drive.
Sets the standby mode (STB), LCD power on (AP1-0),
(BS2-0).
Sets the contrast adjustment (CT6-0) and regulator adjustment (VR3-0).
Specifies the logical operation (LG2-0), AC counter mode (AM), increment/
decrement mode (I/D1-0) and high-speed-write mode (HWM).
Sets the compare register (CP7-0).
Specifies display on (D1-0), reversed display (REV), ,screen division driving
(SPT), and vertical scroll (VLE2-1).
Specifies the serial transfer enable (TE) and index for the COM transfer
instructions (IDX2-0).
Sets an adjustment factor for the Vci voltage (VC2-0).
Specifies the 1st-screen display-start raster-row (VL17-10) and 2nd-
screen display-start raster-row (VL27-20).
Specifies write data mask (WM15-0) at RAM write.
Initially sets the RAM address to the address counter (AC).
Write data to RAM.
Read data from RAM.
sleep mode (SLP), boosting cycle (DC2-0),
boosting ouput multiplying factor (BT3-0), and LCD drive bias value
Description
Execu-tion
Cycle
10 ms
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0