SC2604EVB SEMTECH [Semtech Corporation], SC2604EVB Datasheet - Page 10

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SC2604EVB

Manufacturer Part Number
SC2604EVB
Description
Simple PWM Boost Controller with Input Disconnect FET Drive
Manufacturer
SEMTECH [Semtech Corporation]
Datasheet
Applications Information (Cont.)
soft-start of the switching boost regulator.
The DRV pin of the SC2604 is meant to drive an N-Channel
FET that can disconnect the input supply in the event of an
over-current condition. The OCP/EN capacitor becomes
part of a hiccup oscillator that is charged with 37µA and
discharged with µA to provide a low duty cycle for the
FET Q
It should be understood that sufficiently fast ramp rates
on the OCP/EN pin and the SS/VREF pin can trigger a
hiccup event because of the charging current demanded
by the boost regulator output capacitor.
Setting the Output Voltage
In Figure , an external resistive divider R
center tap tied to the FB pin sets the output voltage.
In some applications, a RC branch (R
Schematic on page 2) will be needed for loop stability.
Maximum Duty Cycle
The maximum duty cycle, D
power conversion ratio
Calculating Current Sense Resistor
Current sense resistor is placed at the input to sense
inductor peak current of the boost regulator. The value of
the resistor can be calculated by
where I
In many applications, a noise filter circuit (R
in the Typical Schematic on page 2) may be needed for
the input current sensing.
© 2007 Semtech Corp.

.
PEAK
is the allowed boost inductor peak current.
max
defines the upper limit of
6
, C
2
7

=200, C
and R
in the Typical
8
0
with its
=0nF
Capacitor at OCP/EN Pin - C
As the current at start-up may hit its current limit threshold,
the ramp rate of the current must be slow enough to allow
the output capacitor to be fully charged to a voltage one
diode drop V
successful start-up at no load, the value of the capacitor at
the OCP/EN pin has to satisfy the following formula:
Disconnect FET Selection
The floating driving voltage of DRV pin drops slightly as
the supply voltage V
on page 8), where a FET with low gate threshold voltage
(V
application, a FET with V
Fairchild, is needed.
Layout Guidelines
Careful attentions to layout requirements are necessary
for successful implementation of the SC2604 PWM
controller. High currents switching at 400kHz are present
in the application and their effect on ground plane voltage
differentials must be understood and minimized.
) The high power parts of the circuit should be laid out
first. A ground plane should be used, the number and
position of ground plane interruptions should be such as
to not unnecessarily compromise ground plane integrity.
Isolated or semi-isolated areas of the ground plane may
be deliberately introduced to constrain ground currents
to particular areas, for example the input capacitor and
bottom Schottky ground.
2) The loop formed by the output Capacitor(s) (C
FET (Q
(D
layout diagram in Figure 4. This loop contains all the high
current, fast transition switching. Connections should
be as wide and as short as possible to minimize loop
inductance. Minimizing this loop area will reduce EMI,
GS(TH)

) must be kept as small as possible, as shown on the
) has to be used for the disconnect FET. In a 5V input

), the current sensing resistor, and the Schottky
d
less than input voltage V
IN
is below 7.5V (Typical Characteristics
GS(TH)
=2V, such as FDD6672A from
OCP/EN
www.semtech.com
IN
. To guarantee a
SC2604
OUT
), the
0

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