TC1270A MICROCHIP [Microchip Technology], TC1270A Datasheet - Page 22

• Manufacturer Part Number: TC1270A
• Description: Voltage Supervisor with Manual Reset Input
• Manufacturer: MICROCHIP [Microchip Technology]

TC1270A/70AN/71A
4.5
The output signals from the Voltage Detect Circuit and
the Manual Reset with Glitch Filter Circuit are OR’d
together and is used to activate the Reset Generator
Module.
After the reset conditions have been removed (the MR
pin is no longer forced low and the input voltage is
greater than the Trip Point voltage), the Reset Genera-
tor circuit determines the reset delay timeout required.
There are three options for the delay circuit. These are:
• 2.19 ms (typical) delay
• 35 ms (typical) delay
• 280 ms (typical) delay
4.5.1
The Reset delay timer ensures that the TC127XA
device will “hold” the embedded system in Reset until
the system voltage has stabilized. The Reset delay
timer time out is shown in
The Reset Delay Timer starts once the Voltage
Detector Circuit output AND the Manual Reset with
Glitch Filter Circuit output become inactive. While the
Reset Delay Timer is active, the RST or RST pin is
driven to the active state. Once the Reset Delay Timer
times-out, the RST or RST pin is driven inactive.
The Reset delay timer (t
voltage rises above the “actual” trip point (V
When the Reset delay timer times out, the Reset output
pin (RST/RST) is driven inactive.
The Reset Delay Timer is cleared, if either (or both) the
Voltage Detector Circuit output OR the Manual Reset
with Glitch Filter Circuit output become active. The RST
or RST pin continues to be driven to the active state.
Figure 4-12
(t
DS22035B-page 22
RST
) is active or inactive.
Reset Generator Circuit
RESET DELAY TIMER
illustrates when the Reset Delay Timer
RST
Table
) starts after the device
4-4.
TRIP
).
4.5.2
The Reset delay timer time out period (t
determines how long the device remains in the Reset
condition. This time out is affected by both the device
V
V
Figures 2-28,
TABLE 4-4:
FIGURE 4-12:
Waveform.
RST
Note 1:
minimum time that
V
DD
DD
rises above V
the Reset Delay
Timer will “hold”
active after V
DD
the Reset pin
and temperature. Typical responses for different
V
This is the
values
TRIP
1.09
17.5
See
Min
140
↑
2-7
Shaded rows are custom ordered time
outs.
EFFECT OF TEMPERATURE ON
RESET POWER-UP TIMER (t
Reset Delay
Timer Inactive
Figures
2-29
and
TRIP
and
DD
See
RESET DELAY TIMER
TIME OUTS
2-8
and 2-30.
2-9,
t
Figures
temperatures
2.19
RST
Typ
280
Reset Power-up Timer
35
© 2007 Microchip Technology Inc.
V
Delay Timer will
“hold” the Reset
2-12,
maximum time
pin active after
that the Reset
DD
This is the
t
rises above
RST
V
Max
4.38
560
70
TRIP
See
2-11
↑
are
2-7
Reset
Delay
Timer
Inactive
Figures
and
and
shown
RPU
2-10
2-8
Units
2-9,
ms
ms
ms
)
RST
in
)