at7601fg AME, Inc., at7601fg Datasheet - Page 9

• Manufacturer Part Number: at7601fg
• Description: Printer Port Controller
• Manufacturer: AME, Inc.

Rev. B.02
AT7601F
5-2-4 EPP Data Port 0 ~ 3
Data Port
Status Port
Control Port
EPP Address
Port
EPP Data
Port 0
EPP Data
Port 1
EPP Data
Port 2
EPP Data
Port 3
When accesses are made to any EPP data port, the contents of DB0-DB7 are buffered (non-inverting) and
output to the ports PD0-PD7 during a write operation. The leading edge of LOW latches the data for the
duration of the EPP write cycle.
During a read operation, ports PD0-PD7 are read, and the leading edge of LOR causes an EPP read cycle
to be performed and the data to be output to the host CPU.
These four registers are available only in EPP mode. Bit definitions of each port are as follows:
REGISTER
AME, Inc.
7
BUSY#
PD7
PD7
PD7
PD7
PD7
PD7
7
1
6
Table 7. Parallel Port and EPP Registers
ACK#
PD6
PD6
PD6
PD6
PD6
PD6
5
6
1
4
PDIR
PD5
PD5
PD5
PD5
PD5
PD5
PE
5
3
IRQEn
SLCT
PD4
PD4
PD4
PD4
PD4
PD4
4
2
ERR#
SLIN
PD3
PD3
PD3
PD3
PD3
PD3
1
3
Printer Port Controller
0
INIT#
PD2
PD2
PD2
PD2
PD2
PD2
2
1
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
PD1
AFD
PD1
PD1
PD1
PD1
PD1
1
1
TMout
PD0
STB
PD0
PD0
PD0
PD0
PD0
0
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